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Reform / reform-boundary-uboot
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Haiying Wang
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Fix some bugs:
1. Correctly set intlv_ctl in cs_config.
2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
3. Set base_address and total memory for each ddr controller in memory
controller interleaving mode.
Signed-off-by: 
Haiying Wang <Haiying.Wang@freescale.com>| Name | Last commit | Last update |
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