Forked from
Reform / reform-boundary-uboot
31583 commits behind the upstream repository.
Lokesh Vutla
authored
Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by:Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
Sricharan R <r.sricharan@ti.com>
| Name | Last commit | Last update |
|---|---|---|
| .. | ||
| arm1136 | ||
| arm1176 | ||
| arm720t | ||
| arm920t | ||
| arm925t | ||
| arm926ejs | ||
| arm946es | ||
| arm_intcm | ||
| armv7 | ||
| ixp | ||
| pxa | ||
| s3c44b0 | ||
| sa1100 | ||
| tegra-common | ||
| tegra114-common | ||
| tegra20-common | ||
| tegra30-common | ||
| u-boot-spl.lds | ||
| u-boot.lds | ||