Skip to content
Snippets Groups Projects
Select Git revision
  • master default protected
  • early-display
  • variant-emmc-nvme-boot
  • 2023-01-25
  • v3
  • variant-emmc-nvme-boot
  • 2020-06-01
7 results

microchip

  • Clone with SSH
  • Clone with HTTPS
  • Forked from Reform / reform-boundary-uboot
    13296 commits behind the upstream repository.
    user avatar
    Purna Chandra Mandal authored
    This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module.
    DDR2 controller operates in half-rate mode (upto 533MHZ frequency).
    
    Signed-off-by: default avatarPaul Thacker <paul.thacker@microchip.com>
    Signed-off-by: default avatarPurna Chandra Mandal <purna.mandal@microchip.com>
    Reviewed-by: default avatarDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Reviewed-by: default avatarTom Rini <trini@konsulko.com>
    Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
    9ffa7a35
    History
    Name Last commit Last update
    ..
    Makefile
    ddr2.c
    ddr2_regs.h
    ddr2_timing.h