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Forked from Reform / reform-boundary-uboot
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Ashish Kumar authored
LS1088A is compliant with the Layerscape Chassis Generation 3 with
eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4
SDRAM memory controller with ECC, Data path acceleration architecture
2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs),
QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc.

Signed-off-by: default avatarAlison Wang <alison.wang@nxp.com>
Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: default avatarAshish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: default avatarRaghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: default avatarShaohui Xie <Shaohui.Xie@nxp.com>
[YS: Revised commit message]
Reviewed-by: default avatarYork Sun <york.sun@nxp.com>
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