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  • early-display
  • variant-emmc-nvme-boot
  • 2023-01-25
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  • variant-emmc-nvme-boot
  • 2020-06-01
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  • Forked from Reform / reform-boundary-uboot
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    Simon Glass authored
    There is no need for this to be in the BSS region. By moving it we can delay
    use of BSS in SPL. This is useful for machines where the BSS region is not
    in writeable space. On 64-bit x86, SPL runs from SPI flash and it is easier
    to eliminate BSS use than link SPL to run with BSS at a particular
    cache-as-RAM (CAR) address.
    
    Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
    Reviewed-by: default avatarTom Rini <trini@konsulko.com>
    d32b2d1c
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