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Driver/DDR: Update DDR driver to allow non-zero base address

York Sun authored 11 years ago

The DRAM base has been zero for Power SoCs. It could be non-zero
for ARM SoCs. Use a macro instead of hard-coding to zero.

Signed-off-by: York Sun <yorksun@freescale.com>

00ec3fd2

History

00ec3fd2 11 years ago

History

Name	Last commit	Last update
..
Makefile
arm_ddr_gen3.c
ctrl_regs.c
ddr1_dimm_params.c
ddr2_dimm_params.c
ddr3_dimm_params.c
interactive.c
lc_common_dimm_params.c
main.c
mpc85xx_ddr_gen1.c
mpc85xx_ddr_gen2.c
mpc85xx_ddr_gen3.c
mpc86xx_ddr.c
options.c
util.c