Skip to content
Snippets Groups Projects
Select Git revision
  • early-display
  • master default protected
  • variant-emmc-nvme-boot
  • 2023-01-25
  • v3
  • variant-emmc-nvme-boot
  • 2020-06-01
7 results
You can move around the graph by using the arrow keys.
Created with Raphaël 2.2.04Feb16Jan30Dec28272618125414Nov12976530Oct2518131282120Sep1730Aug271698727Jul191211109865321230Jun29282725232423222322211918imx8mm_pins.h: add SION to I2C padsMLK-18654-2 imx: Change USB boot device typeMLK-18333-2 imx8m: add QSPI boot devMLK-18243-17: arm: imx-common: fix sd to mmc1 and emmc to mmc2 for i.MX8MMMLK-16758-4 SPL: Add HAB image authentication to FITMLK-16047 imx8mq_evk: Enable eMMC boot supportMLK-18654-3 spl: Un-define the DM USB for SPLarm: mach-imx: sys_proto: add is_imx8() functionMLK-18437-1 usb: ehci-mx6: fix board_usb_clean issueMLK-18290-2 ehci-mx6: Update driver to support i.MX8MMMLK-16175-1 usb: ehci-mx6: Turn on the power domain of USB PHYMLK-15013-1 ehci-mx6: Add i.MX8 OTG controller supportMLK-14445-5 ehci-mx6: Add OTG ID detecting by GPIOMLK-13450-15 ehci-mx6: Add powerup_fixup implementationMLK-13450-14 ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULPMLK-12483-4 mx6: Modify drivers to disable fused modulesENGR00328312 i2c: imx: Optimize the i2c device recovery solutionnitrogen8m: add CONFIG_SYS_I2C_MXC_I2C1/2/3/4nitrogem8m: remove ddr, mv ddr/lpddr4_timing.c upnitrogen8m: use common ddr_initnitrogen8m: remove ddr_memory_map.hnitrogen8m: use common ddrphy_trainnitrogen8m: ddr: ddrphy_train: use loop for fsp_msgnitrogen8m: ddr: change lpddr4_timing.h to .cnitrogen8m: move lpddr4_ddrc_cfg to lpddr4_timing.hnitrogen8m: lpddr4_timing: add static to structuresnitrogen8m: ddr: convert ddrphy_train to use listsnitrogen8m: replace wait_ddrphy_training_complete.c with common codenitrogen8m: use common ddr_load_train_firmwarenitrogen8m: use CONFIG_IMX8M_LPDDR4arm: imx8m: soc: add ft_add_optee_node for imx8mmarm: imx8m: soc: imx8mq can have 4G, imx8mm can have 8Garm: imx8m: soc: set GPR_TZASC_SWAP_ID for imx8mmarm: imx8m: clock_slice: fix AHB_CLOCK_SLICE/IPG_CLOCK_SLICEarm: imx8m: clock_imx8mq: mask out SSCG_PLL_REF_DIVR2_MASK/SSCG_PLL_FEEDBACK_DIV_F1_MASK alsoddr: imx8m: lpddr4_init: don't call ddrphy_trained_csr_save for imx8mqddr: imx8m: save mstr2 value for reuseddr: imx8m: ddrphy_train: only set clk when changedddr: imx8m: ddrphy_utils: don't use bypass for imx8mqddr: imx8m: use dwc_ddrphy_apb_wr_list