The AMCC Secquoia board has been changed in a new revision from using a
33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD
indicates the difference. This patch reads that bit and uses the correct
clock speed for the board. This code is backward compatable will all
prior boards. All prior boards will be read as 33.000.

Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>

Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
for the 4k NAND boot image so define bus_frequency to 133MHz here
which is save for the refresh counter setup.

Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Detlev Zundel <dzu@denx.de>

G2 core reference manual says decrementer and time base
are decreasing/increasing once every 4 bus clock cycles.
Lets fix it, so time in Linux won't run twice as fast

Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>

What was suppose to be a stack variable was declared as a pointer,
  overwriting random memory.
Also moved the libfdt.a requirement into the main Makefile.  That is
  The U-Boot Way.

Previous versions used full wait states for the chip select #1 which
is connected to the Xilinix SystemACE controller on the AMCC Katmai
evaluation board. This leads to really slow access and therefore low
performance. This patch now sets up the chip select a lot faster
resulting in much better read/write performance of the Linux driver.

Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Sigend-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Domen Puncer <domen.puncer@telargo.com>

Signed-off-by: Stefan Roese <sr@denx.de>

Now 405EZ ports also show upon bootup from which boot device
they are configured to boot:

U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)

CPU:   AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
       Bootstrap Option E - Boot ROM Location EBC (32 bits)
       16 kB I-Cache 16 kB D-Cache
Board: Acadia - AMCC PPC405EZ Evaluation Board

Signed-off-by: Stefan Roese <sr@denx.de>

Add Konstantin Kletschke for scb9328.
Signed-off-by: Peter Pearse <peter.pearse@arm.com>

U-Boot part of Lite5200b low power mode support.
Puts SDRAM out of self-refresh and transfers control to
address saved at physical 0x0.

Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>

Use "setter" functions instead of flags, cleaner and more flexible.
It also fixes the problem noted by Timur Tabi that the ethernet MAC
addresses were all being set incorrectly to the same MAC address.

In bootm, create the "/chosen" node only if it doesn't already exist
  (better matches the previous behavior).
Update for proper reserved memory map handling for initrd.

Set up the portmux for the MMC interface and enable the MMC driver
along with support for DOS partitions, ext2 and FAT filesystems.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>

Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.

The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.

Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682



Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>