These changes were identified by HighSmith Bill ,Mazzyar and Joseph for
DDR configuration in u-boot code. Some are related to performance, some
affect stability and some correct few basic errors in the current
configuration.

The changes have been tested and found to give better memory latency
figures on MPC8313eRDB.LMBench figures prove it.

The changes are:

- CS0_CONFIG[ AP_n_EN] is changed from 1 to 0
  (this may improve performance for application with many read
  or write to open pages).
- CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to
  001 (activating all the CS when only one is used may cause
  unwanted noise on the system)

- TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on
  Tras=45ns)
- TIMING_CFG_1[REFREC] changed from 21 clks to 18clks.

- TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to
  comply with the 3 ODT clk requirements)
- TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4.
- TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks.

- DDR_SDRAM_MODE[AL]changed from 0 to 1.
- DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks.

- DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510.
- DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500.

The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git


The last commit on this tree was 6775c686

Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com>
Cc: Bill HighSmith <Bill.Highsmith@freescale.com>
Cc: Razzaz Mazyar <MRazzaz@freescale.com>
Cc: Josep P J <PJ.Joseph@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

The isdram command prints out decoded information the "serial presence
detect" (SPD) chip on the SDRAM SIMMs.  This can be very helpful when
debugging memory configuration problems.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

The features list:
- Boot from NOR Flash
- DDR2 266MHz hardcoded configuration
- Local bus NOR Flash R/W operation
- I2C, UART, MII and RTC
- eTSEC0/1 support
- PCI host

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

The TSEC emergency priority definition of 831x/837x
is different than the definition of 834x in SPCR register.

Add the other config of TSEC emergency priority into
cpu_init.c

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

The MPC8360ERDK board support patch is added before
the commit 2c5b48fc
so, miss clean up it.

The patch clean up the miss cache config.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>

OneNAND: Separate U-Boot dependent code from OneNAND

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

adjust default environment;
disable SCC ethernet (not used on this board).

Signed-off-by: Wolfgang Denk <wd@denx.de>

qe.c: In function 'qe_upload_firmware':
qe.c:390: warning: pointer targets in passing argument 2
uec.c: In function 'uec_initialize':
uec.c:1236: warning: 'uec_info' may be used uninitialized

Signed-off-by: Dave Liu <daveliu@freescale.com>

Now that bit 29 is the USB PHY reset bit, update the Kilauea port
to remove the USB PHY reset after powerup. The CPLD will keep the
USB PHY in reset (active low) until the bit is set to 1 in
board_early_init_f().

Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: John Rigby <jrigby@freescale.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: Michael Schwingen <michael@schwingen.org>
Acked-by: Stefan Roese <sr@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

- get rid of "version" target whichdidn't really work
- make autoconf.mk depend on version_autogenerated.h to make sure
  to rebuild files as needed
- add XECHO macro to allow for silent build using "make -s"

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Oliver Weber <almoeli@gmx.de>

Currently, when CONFIG_CMDLINE_EDITING is set, bootretry doesn't work.
This patch fixes the problem.

Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>

Signed-off-by: Larry Johnson <lrj@acm.org>

Many of the SPD bytes for DDR2 SDRAM are not interpreted correctly by the
"i2c sdram" command.  This patch provides correct alternative
interpretations when DDR2 memory is detected.

Signed-off-by: Larry Johnson <lrj@acm.org>

With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]

For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.

The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.

Signed-off-by: Wolfgang Denk <wd@denx.de>

(needed for M5475EVB)

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>

boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>