- Oct 10, 2016
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Masahiro Yamada authored
For LD11 and LD20 SoCs, the System Bus and NAND are multiplexed in the same I/O pins. When booting from a NAND device, pin-mux for the System Bus must not be set-up because they are exclusive with each other. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Sep 18, 2016
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Masahiro Yamada authored
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Use the pin-mux data in the pinctrl drivers by directly calling pinctrl_generic_set_state(). Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- May 25, 2016
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Masahiro Yamada authored
The Boot ROM has enabled D-cache and MMU setting DDR memory area as Normal Memory in its page table. Disable D-cache and MMU before jumping to U-Boot proper. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Apr 30, 2016
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Masahiro Yamada authored
The System Bus is not available by default on the ROM boot mode of PH1-LD20. To use devices connected to the System Bus, such as the Micro Support Card, it is necessary to set up pin-muxing and some System Bus Controller register. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Apr 24, 2016
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Masahiro Yamada authored
This is the first ARMv8 SoC from Socionext Inc. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Mar 31, 2016
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Masahiro Yamada authored
Eliminate the "ph1"_ prefixes from function names because "uniphier_" describes the SoC familiy better. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Mar 23, 2016
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Masahiro Yamada authored
There is a bunch of duplication in the System Bus Controller init code. Roughly, there are two types in the SBC mode: Adress/Data Multiplex Mode and Save Pins Mode. Consolidate per-SoC functions into the two, plus per-SoC optional init code. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too long. It would not hurt to drop "PH1_" because "UNIPHIER_" already well specifies the SoC family. Also, rename files for consistency. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Jan 12, 2016
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Masahiro Yamada authored
As mentioned in the log of commit 019df879 (ARM: uniphier: add ProXstream2 and PH1-LD6b support), the DRAM init code was missing for a long time. Finally, here it is. SPL works now. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
These headers are only included locally in arch/arm/mach-uniphier/. There is no reason to export them by putting in the mach/ directory. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
These includes are not necessary. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Sep 24, 2015
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Masahiro Yamada authored
The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Before this commit, the Kconfig menu in mach-uniphier only allowed us to choose one SoC to be compiled. Each SoC has its own defconfig file for the build-test coverage. Consequently, some defconfig files are duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and CONFIG_{SOC_NAME}=y. Now, most of board-specific parameters have been moved to device trees, so it makes sense to include init code of multiple SoCs into a single image as long as the SoCs have similar architecture. In fact, some SoCs of UniPhier family are very similar: - PH1-LD4 and PH1-sLD8 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit) This commit will be helpful to merge some defconfig files for better maintainability. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Without this, build fails if CONFIG_MICRO_SUPPORT_CARD is disabled. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The macro, led_write(), is now only used in C sources. There is no more reason to keep the tricky assembly macro. Replace it with a new C function led_puts(). Also, rename board.h to micro-support-card.h. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The wrapper functions, uniphier_board_*, are just making function calls complex. Remove them. Also, use empty inline functions in case CONFIG_MICRO_SUPPORT_CARD is disabled, so that prototype checking works. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
These input enable settings are handled by the pinctrl drivers. Because the external bus pins are input-enabled by default, on-board devices such as LED still work fine even with this delayed input enabling. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
As the UniPhier serial driver had already switched to Drive Model and the pinctrl drivers are now enabled, these pin-muxing settings are properly handled by the pinctrl drivers. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Mar 23, 2015
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Masahiro Yamada authored
Enable CONFIG_SPL_DM and CONFIG_SPL_SERIAL_SUPPORT, which provide Driver Model UART support on SPL. CONFIG_SYS_SPL_MALLOC_{START,SIZE} should be dropped because simple malloc is preferred on SPL. Dlmalloc requires some static variables on .data section that is not available yet for NOR boot mode etc. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The UniPhier platform is going to enable Driver Model and UART support on SPL. Move UART pin settings to early_pin_init(), which is called from SPL. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- Feb 28, 2015
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Masahiro Yamada authored
This code is duplicated in ph1-ld4/sg_init.c and ph1-pro4/sg_init.c. Merge the same code into a new file, memconf.c. The helper functions no longer have to be placed in the header file. Also, move them into memconf.c. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Split the current clkrst_init() into two functions: - early_clkrst_init(): called from SPL Deassert the reset signals of the memory controller and some other basic cores. - clkrst_init(): called from main U-boot Deassert the reset signals that are necessary for the access to peripherals etc. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Since commit 0e7368c6 (kbuild: prepare for moving headers into mach-*/include/mach), we can replace #include <asm/arch/*.h> with <mach/*.h> so we do not need to create the symbolic link during the build. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Move arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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- Feb 06, 2015
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Masahiro Yamada authored
Now init functions called from board_postclk_init() and dram_init() are only necessary for SPL. Move them to spl_board_init() for clean-up. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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- Oct 05, 2014
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Masahiro Yamada authored
These are used by Panasonic UniPhier SoC family. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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