IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.

So use IFC acessor functions instead of in_be32().

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

-A_007662 states that for x1 link width, PCIe2 controller trains in
 Gen1 speed while configured for Gen2 speed.
 Workaround:Set the width to x1 and speed to Gen2 by writing to
 CCSR registers in PBI phase

-A_008007 states that PVR register may show random value.
 Workaround: Reset PVR register using DCSR space in PBI phase

Add PBI based software workaround for A_007662 and A_008007
in t104x_pbi.cfg. This is required for SPL-based bootloaders
like NAND-boot, SD-boot, SPI-boot

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

This support of CPLD includes

    - Files and register definitions
    - Command to switch alternate bank
    - Command to switch default bank

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

LIODN entry for B4860/B4420 mentions USB controller as "mph"
insread of "dr". This results in PAMU not permitting bus
transactions for USB DR controller on B4860 resulting in
USB function failure. Replacing "fsl-usb2-mph" with
"fsl-usb2-dr" allows USB DR controller bus transactions

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Reviewed-by: Sun Yusong-R58495 <yorksun@freescale.com>

Tested on the following baseline (note "dirty" since I enabled
ALT_BOOT in the config in order to use the alternate boot bank.)

Everything seems to work fine with no additional changes.  The
banner warning message is now gone.

 ---

U-Boot 2014.10-rc1-00075-ge49f14af1349-dirty (Aug 14 2014 - 10:26:15)

CPU:   8548E, Version: 2.1, (0x80390021)
Core:  e500, Version: 2.2, (0x80210022)
Clock Configuration:
       CPU0:990  MHz,
       CCB:396  MHz,
       DDR:198  MHz (396 MT/s data rate), LBC:99   MHz
L1:    D-cache 32 KiB enabled
       I-cache 32 KiB enabled
I2C:   ready
DRAM:  Detected UDIMM
    SDRAM: 128 MiB
256 MiB (DDR2, 64-bit, CL=3, ECC off)
Flash: 72 MiB
L2:    512 KiB enabled
*** Warning - bad CRC, using default environment

PCI: Host, 64 bit, 66 MHz, sync, arbiter
  00:01.0     - 8086:1026 - Network controller
PCI1: Bus 00 - 00

PCIe1: Root Complex, x1 gen1, regs @ 0xe000a000
  02:00.0     - 1148:9e00 - Network controller
PCIe1: Bus 01 - 02
In:    serial
Out:   serial
Err:   serial
Net:   eTSEC0 [PRIME], eTSEC1
Hit any key to stop autoboot:  0
=> ver

U-Boot 2014.10-rc1-00075-ge49f14af1349-dirty (Aug 14 2014 - 10:26:15)
powerpc-linux-gcc (GCC) 4.5.2
GNU ld (GNU Binutils) 2.21
=>

 ---

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Reviewed-by: York Sun <yorksun@freescale.com>

NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some
platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure
on XAUI PHY, so set this bit definitely to align with the RM.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>

1. use Payload length check disable when enable MAC;
2. add XGMII support for setting MAC interface mode;
3. only enable auto negotiation for Non-XGMII mode;
4. return 0xffff if clause 22 is used to read 10G phy_id;

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-By: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>

Until now this defined to be 512KB and the total binary size actually
was on the edge of this limit. Most of the powerpc boards have thus
moved to 768KB.

Since on the current kmp204x boards there is 1MB reserved for u-boot on
the SPI boot flash, there is no problem to set the limit to 768KB as
well to be on line with the other powerpc boards and to eventually
configure in some additional features (and binary size) to u-boot.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>

Add two missing Kconfig options for Novena and drop the SPL
from the Novena config.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>

The magic bit toucher needs to be updated to reflect the new board Kconfig structure

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Add support for the 2 ehci controllers found on the sun6i (A31) soc.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Marek Vasut <marex@denx.de>

Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to
Kconfig being the right thing to do, an added advantage of this is that it
allows for boards without Vbus gpio-s.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Enable the SPL now that we've all the necessary bits in place.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Without this the cache will only work in write-through mode, and as soon as
it is put in write-back mode things break.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Add full support for dram initialization, using a fixed clock and autodetection
of the memory organization (numbers of channels, bus-width, etc.).

This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK,
extended with extra initialization sequences and the autodetect algorithm
from boot0.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

In preparation for adding sun6i dram support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Not used atm, for future use (e.g. PSCI).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Add clock_init_safe and clockset_pll5 functions, as these are needed for
SPL support resp. DRAM init (which is needed for SPL too).

Also add some extra clock register constant defines.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

The A31 uses the AXP221 pmic for various voltages.

Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
--
Changes in v2:
-Rebase
Changes in v3:
-Add support for all dldo and aldo-s
-Add Kconfig option to select building AXP221 and to select voltage of
 dldo and aldo-s
Changes in v4:
-Add axp221_setbits helper function
-Use symbolic names for enabled bits in CTRL1 - CTRL3 registers

The A31 uses a new push-pull two wire interface, which features higher
transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8
bytes each time, this driver will only see very little use and thus is
limited to single byte transmission only.

Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

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Move CONFIG_DEFAULT_DEVICE_TREE from board config
directly to defconfig.

This patch removes compilation warning:
include/configs/zynq_zybo.h:24:0: warning: "CONFIG_DEFAULT_DEVICE_TREE"
redefined [enabled by default]
 #define CONFIG_DEFAULT_DEVICE_TREE zynq-zybo

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Commit 2e07c249 (kconfig: arm: introduce symbol for ARM CPUs)
collected the default values of CONFIG_SYS_CPU into arch/arm/Kconfig.

This commit moves "armv8" to there for consistency.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Georges Savoundararadj <savoundg@gmail.com>

This commit adds "select CPU_V7" for some new boards that were not
covered by commit 2e07c249
(kconfig: arm: introduce symbol for ARM CPUs).

Redundant "SYS_CPU" defines and "string" directives should be removed.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Georges Savoundararadj <savoundg@gmail.com>

There is no board with CPU "arm_intcm".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

The Makefiles call the respective interpreter explicitly, but this makes
it easier to use the scripts manually.

(This commit follows commit 06ed5c2bfaca of Linux Kernel)

Signed-off-by: Michal Marek <mmarek@suse.cz>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

mcc200 and prs200 are old and have no maintainer. Remove the boards.

This also removes the mcc200 specific 1bpp BMP support from
common/lcd.c

Cc: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>

This implies that all the km_kirkwood boards and their variants now are
using the generic board init sequence.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>

When DEBUG is set, output memory region used for malloc().

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>

size_t is the canonical type to represent variables that contain a size.
Use it instead of signed integer. Physical addresses can be larger than
32-bit, so use a more appropriate type for them as well. phys_addr_t is
a type that is 32-bit on systems that use 32-bit addresses and 64-bit if
the system is 64-bit or uses a form of physical address extension to use
a larger address space on 32-bit systems. Using these types the same API
can be implemented on a wider range of systems.

Signed-off-by: Thierry Reding <treding@nvidia.com>

Remove two gratuituous blank lines, uses u32 (instead of int) as the
type for values that will be written to a register, moves the beginning
of the variable declaration section to a separate line (rather than the
one with the opening brace) and keeps the function signature on a single
line where possible.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>

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This reverts commit 1e96220a.

Remove duplicated vxworks.h header.
The same change was done by
"ARM: prevent compiler warnings from bootm.c"
(sha1: 8d196e52)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

CONFIG_UNIPHIER_SERIAL has been moved to Kconfig and
it is defined in ./.config but not in spl/.config,
so pin_init() should be called from the normal image
so that UART works correctly.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

This commit merges
  arch/arm/cpu/armv7/uniphier/ph1-*/board_postclk_init.c
to
  arch/arm/cpu/armv7/uniphier/board_postclk_init.c

Because PH1-Pro4 does not have the BCU block, add __weak to
bcu_init().

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>