The Gateworks Ventana EEPROM contains a set of configuration bits that
affect the removal of device-tree nodes that support peripherals that do not
exist on sub-loaded boards. This patch adds:
 - a structure to define a config bit name, dt node alias, bit position
 - an array of supported configuration items
 - an econfig command to get/set/list configuration bits
 - use of the array when adjusting the FDT prior to boot

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

The PCISKT_WDIS# gpio allows for asserting WDIS# going to the various PCIe
sockets on the Ventana board.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Enable the SION bit on gpio outputs that we wish to be able to read the
value of.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was
added to the GW53xx on revB PCB's). Additionally, remove the duplicate
config for GW54xx.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

The Gateworks System Controller EEPROM config is flash based. Add a delay
following writes to avoid errors on back-to-back writes.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

During manufacturing this bit is not getting enabled when it should be, so
we will ignore it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

NAND devices have differing layouts with respect to page size and pages per
block. These parameters affect the parameters that need to be passed to
mkfs.ubifs and ubinize used to create UBI images. The various NAND chips
supported by Gateworks Ventana fall into two different layouts which we
refer to as 'normal' and 'large'. This layout is useful when referencing
ubi files to download and flash so we create a dynamic env variable for it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Use the latest DDR initialization values suggested by the FSL hardware team.

While at it, add some comments for clarification.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.

Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>

Building the SPL in Thumb mode saves roughly 30% in size of the
resulting SPL binary. As the size of SPL it limited on the MX6,
this helps a lot.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>

The COL field value cannot be easily calculated from the desired
column number. Instead, there are special cases for that, see the
datasheet, MMDCx_MDCTL field description, field COL . Cater for
those special cases.

Signed-off-by: Marek Vasut <marex@denx.de>

The MX6 DRAM controller can be configured to handle 4GiB of DRAM, but
only 3840 MiB of that can be really used. In case the controller is
configured to operate a 4GiB module, the imx_ddr_size() function will
correctly compute that there is 4GiB of DRAM in the system. Firstly,
the return value is 32-bit, so the function will effectively return
zero. Secondly, the MX6 cannot address the full 4GiB, but only 3840MiB
of all that. Thus, clamp the returned size to 3840MiB in such case.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>

Fix the name of the CCM CHSCCDR register.

Signed-off-by: Marek Vasut <marex@denx.de>

Currently I don't have access to a mx31pdk board.

Magnus was the original maintainer of the board and accepted to take back
this role.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Magnus Lilja <lilja.magnus@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>

This allows u-boot to load different OS or Bare Metal application on
different cores of the i.MX6 SoC.
For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Stefano Babic <sbabic@denx.de>

On MarS usdhc3 is eMMC, on RIoT usdhc3 is uSD and eMMC is usdhc4.

Don't run the MarS specific eMMC reset code on usdhc3 when
board_type == BOARD_IS_RIOTBOARD

Signed-off-by: Iain Paton <ipaton0@gmail.com>

aristainetos board was merged in u-boot-imx before
Kconfig was integrated, but it is not yet
mainline.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>

Conflicts:
	boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>

Enable CONFIG_SYS_GENERIC_BOARD for the i.MX31 PDK board.

Tested on actual hardware.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>

It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already
know it is a PMIC.

Call it simply 'PFUZE100' instead.

Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of
register CCM_CIMR corresponds to bit 19 so fix its definition accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

According to the Reference Manual the 'wb_per_at_lpm' field of register
CCM_CLPCR corresponds to bit 16 so fix its definition accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

According to the Reference Manual the 'spdif0_clk_podf' field of register
CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset
definitions accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

'omux' field is not used anywhere and such layout is not valid for mx6solox.

Instead of adding more ifdef's into the structure, let's simply remove this
unused 'omux' field.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

A previous update to the I2C stack introduced a typo in the
configuration option. Fix the typo and therefore allow the
RTC to work correctly with the 'date' command again.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Signed-off-by: Tom Rini <trini@ti.com>

Messages to afleming@freescale.com now bounce, and should be
directed to my personal address at afleming@gmail.com

Signed-off-by: Andy Fleming <afleming@gmail.com>

The _config part is gone for sure, the _defconfig target could at least
work. I have not verified this for all targets though.

It's easier to Cc Masahiro on Kconfig-related changes with a git-mailrc
alias.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

Reflect the latest build system to doc/README.SPL.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

This document is too old and useless.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

if status register do never set MXC_CSPICTRL_TC, spi_xchg_single
endless loops. Add a timeout here to prevent endless hang.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Dirk Behme <dirk.behme@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

This parameter should also be supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>