Checking the pre_periph_clk_sel and pre_periph2_clk of CCM CBCMR
register, if the PLL2 PFD0 or PLL2 PFD2 is used for the clock source,
do not reset this PFD to avoid system hang. Customers may set this
in DDR script or use BT_FREQ to select low freq boot.

Signed-off-by: Ye.Li <B37916@freescale.com>

1. Set the image load partition to the first FAT partition.
2. Set the kernel rootfs partition to the second partition.

Signed-off-by: Ye.Li <B37916@freescale.com>

To support loading FDT file for kernel, add the fdt address,
file and loading script to arm2 board default environment.

Signed-off-by: Ye.Li <B37916@freescale.com>

Add fine-tuning for the DRAM configuration according to the DRAM chip
datasheet. THis configuration applies to both Hynix HY5DU12622DTP and
Samsung K5H511538J-D43 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Enable the power to the USB port only when the USB port is really needed.
Do not enable the power unconditionally.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Instead of waiting for a fixed period of time and hoping for the best
that the DRAM will start, read back an EMI status register which tells
us exactly when the DRAM started.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

According to i.MX23 datasheet Table 32-17, we must wait for the supply
to settle before disabling the current limiter. Indeed, not waiting a
little here causes the system to crash at times.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Add board-specific callbacks for enabling/disabling port power
into the MXS EHCI controller driver. This is in-line with the
names of callbacks on other systems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

When CONFIG_SECURE_BOOT is enabled, the signed images
like kernel and dtb can be authenticated using iMX6 CAAM.
The added command hab_auth_img can be used for HAB
authentication of images. The command takes the image
DDR location, IVT (Image Vector Table) offset inside
image as parameters. Detailed info about signing images
can be found in Freescale AppNote AN4581.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>

Let's enable CONFIG_SYS_GENERIC_BOARD in order to get rid of warnings related
to generic board support is not in place.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

We should pass the MMC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Provide cgtqmx6eval board its own variant of ddr
setup config file. Move board/freescale/imx/ddr/
mx6q_4x_mt41j128.cfg to board/freescale/mx6sabresd/
as this is was designed for the mx6sabresd board.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

Sabrelite board has two solts: 0 is SD3 (bottom) slot and 1 is uSD4 (top) slot.
This patch makes use of both slots instead of only one.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>

Let's enable CONFIG_SYS_GENERIC_BOARD in order to get rid of warnings related
to generic board not being supported.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

We should pass the SDHC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

We should not hardcode CONFIG_NETMASK in the config file.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Disable subpage write when using PMECC to prevent buggy partial page write.

This fix has been taken from linux sources (see commit
90445ff6241e2a13445310803e2efa606c61f276)

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Using CPU_HAS_PCR micro to present the SoC has pcr
(peripheral control register).

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

When use pcr (peripheral control register), then we won't need
to care about the peripheral ID.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Add NOR flash hardware init function, including SMC and PIO
configuration.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

We defined the macro pmecc_readl(b)/pmecc_writel for pmecc register access.
But in the driver we also use the readl(b)/writel.
To keep consistent, this patch make all use pmecc_readl(b)/pmecc_writel.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

This patch adds boot script support to am335x_evm

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>

OMAP4: Use generic 'load' command instead of 'fatload' for 'loadbootscript' and 'loadbootenv' as already done for 'loadimage' and 'loaduimage'.

This patch uses generic 'load' command instead of 'fatload' for 'loadbootscript' and 'loadbootenv' as already done for 'loadimage' and 'loaduimage' for OMAP4 boards.

This allows to use EXT partition instead of FAT, while keeping FAT compatibility.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>

This patch implements a workaround to fix DDR3 memory issue.
The code for workaround detects PGSR0 errors and then preps for
and executes a software-controlled hard reset.In board_early_init,
where logic has been added to identify whether or not the previous
reset was a PORz. PLL initialization is skipped in the case of a
software-controlled hard reset.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Keegan Garcia <kgarcia@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

Commit f219e013 (tools: Import Kconfiglib)
added SPDX GPL-2.0+ to this library by mistake.
It should be ISC.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Ulf Magnusson <ulfalizer@gmail.com>

commit d6d07a9b... arm: vf610: add NAND support for vf610twr
generates the following warnings:

WARNING: no status info for 'vf610twr_nand'
WARNING: no maintainers for 'vf610twr_nand'WARNING: no status info for
'vf610twr_nand'

This is due to the fact that vf610twr_nand_defconfig has no Maintainer.
This patch proposed Alison as Maintainer and fix it.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Alison Wang <b18965@freescale.com>
CC: Stefan Agner <stefan@agner.ch>

At the high level, the problem is that we set gd multiple times (and
still do, even after the commit we're reverting).  We set important
parts of gd to the copy which is not above stack but rather in the data
section.  For the release, we're going to revert this change and for the
next release we shall correct things to only, really, set gd once to an
appropriate location and ensure that comments about it are correct too.

This reverts commit f0c3a6c4.

Acked-by: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@ti.com>

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

We do not have to distinguish CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI
from CONFIG_TARGET_VEXPRESS_AEMV8A.  Rename the former to the latter.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Cc: David Feng <fenghua@phytium.com.cn>

When a DNS query is sent out, the ethernet packet can get directed to
the MAC address of a server that was communicated to before.  This is
wrong when the previously stored MAC address corresponds to a different
server's IP address, i.e. when the IP address of the previous and the
current communication are different.

The error can get reproduced by running a sequence of e.g. a TFTP
download and a DNS query, where the TFTP and DNS servers reside on
individual machines.

The fix is to clear the server's MAC address that might be left from a
previous operation, and to fetch the peer's MAC address in a new ARP
lookup, before the DNS query is sent.  This is the approach taken in
other network services, like 8e52533d ("net: tftpsrv: Get correct
client MAC address").

Reported-by: Dirk Zimoch <dirk.zimoch@psi.ch>
Signed-off-by: Gerhard Sittig <gsi@denx.de>