- Nov 17, 2015
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Alexey Brodkin authored
Up until now there was no need in those stubs. But since following commit compilation of U-Boot on ARC is broken: ------------------------>8---------------------- commit 7861204c Author: Stephen Warren <swarren@wwwdotorg.org> Date: Sat Oct 3 13:56:46 2015 -0600 itest: make memory access work under sandbox itest accesses memory, and hence must map/unmap it. Without doing so, it accesses invalid addresses and crashes. Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org> Reviewed-by:
Simon Glass <sjg@chromium.org> ------------------------>8---------------------- That's because CMD_ITEST is enabled by default in common/Kconfig and now map_physmem()/unmap_physmem() is used there. So this patch adds missing stubs for ARC. Signed-off-by:
Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
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- Nov 13, 2015
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Bin Meng authored
Now that we have converted all x86 boards to use driver model pci, remove these legacy pci codes. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
Move to driver model for pci on QEMU. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
Move chipset-specific codes such as PAM init, PCIe ECAM and MP table from pci.c to qemu.c, to prepare for DM PCI conversion. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
The call to pci_run_vga_bios() is not needed as this is handled in the vesa_fb driver. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
According to Atom E6xx datasheet, setting VGA Disable (bit17) of Graphics Controller register (offset 0x50) prevents IGD (D2:F0) from reporting itself as a VGA display controller class in the PCI configuration space, and should also prevent it from responding to VGA legacy memory range and I/O addresses. However test result shows that with just VGA Disable bit set and a PCIe graphics card connected to one of the PCIe controllers on the E6xx, accessing the VGA legacy space still causes system hang. After a number of attempts, it turns out besides VGA Disable bit, the SDVO (D3:F0) device should be disabled to make it work. To simplify, use the Function Disable register (offset 0xc4) to disable both IGD (D2:F0) and SDVO (D3:F0) devices. Now these two devices will be completely disabled (invisible in the PCI configuration space) unless a system reset is performed. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
Add Kconfig options for 8259 and 8254. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
Rename pcat_timer.c to i8254.c and pcat_interrupts.c to i8259.c, to match their header file names (i8254.h and i8259.h). Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
Initialize counter 1, used to refresh request signal. This is required for legacy purpose as some codes like vgabios utilizes counter 1 to provide delay functionality. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
This cleans up i8254 and i8259 codes to fix several cosmetic issues, like coding convention and some comments improvement. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
PARANOID_IRQ_TRIGGERS is not referenced anywhere in U-Boot. Remove these dead codes wrapped by it. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
CONFIG_SYS_NUM_IRQS is actually not something we can configure, but an architecture defined number of ISA IRQs. Move it from x86-common.h to asm/interrupt.h and rename it to SYS_NUM_IRQS. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Simon Glass <sjg@chromium.org>
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Francois Retief authored
Signed-off-by:
Francois Retief <fgretief@spaceteq.co.za>
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Daniel Hellstrom authored
Signed-off-by:
Daniel Hellstrom <daniel@gaisler.com>
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Daniel Hellstrom authored
Signed-off-by:
Daniel Hellstrom <daniel@gaisler.com>
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Daniel Hellstrom authored
Signed-off-by:
Daniel Hellstrom <daniel@gaisler.com>
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Daniel Hellstrom authored
Signed-off-by:
Daniel Hellstrom <daniel@gaisler.com>
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Francois Retief authored
Signed-off-by:
Francois Retief <fgretief@spaceteq.co.za>
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Francois Retief authored
Update the LEON2/3 serial driver to make use of the readl and writel macros as well as the WATCHDOG_RESET() macro. Add readl/writel and friends to the asm/io.h file. Introduce the gd->arch.uart variable to store register address. Lastly, remove baudrate scaler macro variables from board config. It is now calculated in the serial driver using the global data variable. Signed-off-by:
Francois Retief <fgretief@spaceteq.co.za>
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Francois Retief authored
Signed-off-by:
Francois Retief <fgretief@spaceteq.co.za>
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Francois Retief authored
Fixes broken search and replaced license changes in files cpu/leon3/start.S and include/asm/winmacro.h from commit 1a459660 Signed-off-by:
Francois Retief <fgretief@spaceteq.co.za> Series-to: u-boot Series-cc: Tom Rini <trini@konsulko.com> Series-version: 2 Cover-letter: sparc: Updates to SPARC architecture in preperation for generic board This patch series is a backlog of preparation work for upcomming generic board changes. I first want to get these reviewed and submitted to mainline before sending out more patches. END
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- Nov 12, 2015
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Guillaume REMBERT authored
Dear u-boot community, I just made a small change on the openrisc-generic platform configuration to take in account the new naming convention (or1k instead of or32, so the build process gets fine). Could you take care to review and approve the following patch, please? Kind regards,
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Dirk Eibach authored
The gdsys strider board is based on a Freescale MPC8308 SOC. It boots from NOR-Flash, kernel and rootfs are stored on SD-Card. On board peripherals include: - 1x 10/100 Mbit/s Ethernet (optional) - Lattice ECP3 FPGA connected via eLBC Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> [trini: Drop setting CONFIG_SYS_GENERIC_BOARD, this is always true now] Signed-off-by:
Tom Rini <trini@konsulko.com>
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Prabhakar Kushwaha authored
Fix below compilation warnings- drivers/gpio/hi6220_gpio.c: In function ‘hi6220_gpio_probe’: drivers/gpio/hi6220_gpio.c:82:15: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] bank->base = (u8 *)plat->base; Signed-off-by:
Prabhakar Kushwaha <prabhakar@freescale.com>
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Peng Fan authored
Compile misc.c for mx7, since we need related function for lcdif and nand. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Sanchayan Maity <maitysanchayan@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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Peng Fan authored
Need to call lcdif_power_down to make lcdif in initial state before kernel boot. Similar issue for uboot reset with lcdif enabled, system will hang after serveral times resetting. Need to let lcdif initial state to make all go well. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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Peng Fan authored
We need to power down lcdif before uboot reset to make reset can pass stress test. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Introudce a new function lcdif_power_down. 1. Waits for a VSYNC interrupt to guarantee the reset is done at the VSYNC edge, which somehow makes the LCDIF consume the display FIFO(?) and helps the LCDIF work normally at the kernel stage. 2. Add power down function to stop lcdif. The reason to introduce lcdif_power_down is that we want lcdif to be in initial state when doing uboot reset or before kernel boot to make system stable, otherwise system may hang. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by:
Anatolij Gustschin <agust@denx.de>
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Peng Fan authored
Implement mxs_set_lcdclk, enable_lcdif_clock and enable_pll_video. The three API can be used to configure lcdif related clock when CONFIG_VIDEO_MXS enabled. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Add i.MX6UL/SX LCDIF related macros. Discard uneccessary '#ifdef xxx'. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by:
Stefano Babic <sbabic@denx.de>
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Peng Fan authored
1. Move WDOG3_BASE_ADDR to '#if !(defined(__ASSEMBLY__))'. 2. Add i.MX6UL LCDIF register base address. And Introduce LCDIF1_BASE_ADDR to support runtime check. 3. include <asm/imx-common/regs-lcdif.h> for imx-regs.h to avoid building error for mxsfb.c, since mxsfb.c use imx-regs.h. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Share one lcdif structure for i.MXes. 1. Discard struct mxs_lcdif_regs from imx-regs.h of i.MX7 2. Add i.MX6SX/6UL/7D support in imx-lcdif.h of imx-common Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Move 'struct mxs_lcdif_regs' and lcdif related macro definitions to arch/arm/include/asm/imx-common/regs-lcdif.h. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
There are uint8_t, uint32_t types in regs-common.h, so include linux/types.h. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
regs-common.h must be wrapped with #ifndef __ASSEMBLY__ Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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Peng Fan authored
Change mxs_set_lcdclk prototype to add a new parameter base_addr. There are two LCD interfaces for i.MX6SX, we may support LCDIF1 or LCDIF2. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by:
Anatolij Gustschin <agust@denx.de>
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Peng Fan authored
1. add basic psci support for imx7 chip. 2. support cpu_on and cpu_off. 3. switch to non-secure mode when boot linux kernel. 4. set csu allow accessing all peripherial register in non-secure mode. Signed-off-by:
Frank Li <Frank.Li@freescale.com> Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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Peng Fan authored
The code such as PSCI in section named secure is bundled with u-boot image, and when bootm, the code will be copied to their runtime address same to compliation/linking address - CONFIG_ARMV7_SECURE_BASE. When compile the PSCI code and link it into the u-boot image, there will be relocation entries in .rel.dyn section for PSCI. Actually, we do not needs these relocation entries. If still keep the relocation entries in .rel.dyn section, r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid address which may not support read/write for one SoC. 102 /* relative fix: increase location by offset */ 103 add r0, r0, r4 104 ldr r1, [r0] 105 add r1, r1, r4 106 str r1, [r0] So discard them to avoid touching the relocation entry in arch/arm/lib/relocate.S. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Cc: Tom Warren <twarren@nvidia.com> Cc: York Sun <yorksun@freescale.com> Cc: Hans De Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by:
Albert ARIBAUD <albert.u.boot@aribaud.net>
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Stephen Warren authored
p2371-2180 is the engineering board name for the Jetson TX1 developer kit. Update Kconfig description and help text to make this obvious to everyone. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Alexandre Courbot authored
Rename GPU functions to less generic names to avoid potential name collisions. Signed-off-by:
Alexandre Courbot <acourbot@nvidia.com> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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