- Jul 31, 2013
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Axel Lin authored
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com>
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- Jul 24, 2013
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by:
Tom Rini <trini@ti.com>
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- Jul 02, 2013
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Axel Lin authored
The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs. These SoCs have different gpio count but currently omap_gpio driver uses hard coded 192 which is wrong. This patch fixes this issue by: 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h. 2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5. Thanks for Lubomir Popov to provide valuable comments to fix this issue. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Tested-by:
Lubomir Popov <lpopov@mm-sol.com> Acked-by:
Heiko Schocher <hs@denx.de>
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- Jun 25, 2013
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Axel Lin authored
Call s5p_gpio_set_value() to avoid code duplication. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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Axel Lin authored
Current code had writel arguments the wrong way around, fix it. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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- May 13, 2013
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Sonic Zhang authored
The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx. A lot of machine macros are used to accomodate both code in one gpio driver. This patch split the old gpio driver and move new gpio2 support to the generic gpio driver folder. - To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's config header file. - The gpio2 driver supports bf54x, bf60x and future ADI processors, while the older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561. - All blackfin specific gpio function names are replaced by the generic gpio APIs. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com>
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- May 09, 2013
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Michal Simek authored
Microblaze uses gpio which is connected to the system reset. Currently gpio subsystem wasn't used for it. Add gpio driver and change Microblaze reset logic to be done via gpio subsystem. There are various configurations which Microblaze can have that's why gpio_alloc/gpio_alloc_dual(for dual channel) function has been introduced and gpio can be allocated dynamically. Adding several gpios IP is also possible and supported. For listing gpio configuration please use "gpio status" command This patch also remove one compilation warning: microblaze-generic.c: In function 'do_reset': microblaze-generic.c:38:47: warning: operation on '*1073741824u' may be undefined [-Wsequence-point] Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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- Feb 20, 2013
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Holger Hans Peter Freyther authored
The differences include the number of GPIOs and that one is not required to set the pinmux on request. Signed-off-by:
Holger Hans Peter Freyther <holger@freyther.de>
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- Feb 18, 2013
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Tomas Novotny authored
The pinmux was generated from linux/arch/arm/mach-davinci/da830.c as of kernel version 3.7.5. If the driver is used for the da850, then SoC variant must be specified by CONFIG_SOC_DA850. Signed-off-by:
Tomas Novotny <tomas@novotny.cz> Cc: Tom Rini <trini@ti.com>
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- Dec 10, 2012
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Nikita Kiryanov authored
Add gpio_is_valid() to omap_gpio API Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by:
Igor Grinberg <grinberg@compulab.co.il>
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- Dec 06, 2012
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Bill Richardson authored
We can generally trust the ICH to have GPIO Bank 0 (the first 32 pins) in the same place across all versions. This change adds two more banks, for up to 96 GPIOS. BUT: - Not all chipsets have the same number of GPIOs - Not all chipsets have the same number of GPIO banks - Not all chipsets put the additional banks at the same offset from GPIOBASE - There so many chipset variants that it's pretty much impossible to support them all, or even keep track of the new ones. So, although this adds suppport for the additional banks that seem to work for the particular variants of CougarPoint Mobile chipsets that we've tried, there's no chance it will support everything Intel produces. Good luck. Signed-off-by:
Bill Richardson <wfrichar@chromium.org> Signed-off-by:
Simon Glass <sjg@chromium.org>
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Bill Richardson authored
Implement <asm-generic/gpio.h> functions for Intel ICH6 and later. Only GPIOs 0-31 are handled by this code. Signed-off-by:
Bill Richardson <wfrichar@chromium.org> Signed-off-by:
Simon Glass <sjg@chromium.org>
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- Nov 15, 2012
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Łukasz Majewski authored
Now proper GPIO parts numbering is handled at Samsung devices. This fix is necessary for code using GPIO located at other banks than first. Test HW: - Exynos4210 - Trats - S5PC110 - goni Signed-off-by:
Lukasz Majewski <l.majewski@samsung.com> Signed-off-by:
Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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- Nov 10, 2012
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Troy Kisky authored
Use CONFIG_MX6 when the particular processor variant isn't important. Reserve the use of CONFIG_MX6Q to specifically test for quad cores variant. Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com>
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- Nov 04, 2012
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Kim Phillips authored
mpc83xx_gpio.c:166:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_f' mpc83xx_gpio.c:190:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_r' Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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- Oct 15, 2012
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Tom Warren authored
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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- Oct 08, 2012
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Laurence Withers authored
Use the standard CMD_RET_* constants to clearly report errors from the pca953x command. In addition, print error messages when I2C communication fails. Signed-off-by:
Laurence Withers <lwithers@guralp.com>
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Laurence Withers authored
Signed-off-by:
Laurence Withers <lwithers@guralp.com>
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- Oct 03, 2012
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Gabriel Huau authored
It's now possible to use the gpio driver interface for s3c2440. This patch add iomux definitions too. Signed-off-by:
Gabriel Huau <contact@huau-gabriel.fr>
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- Sep 10, 2012
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Tom Warren authored
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by:
Tom Warren <twarren@nvidia.com> Acked-by:
Stephen Warren <swarren@nvidia.com>
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- Sep 01, 2012
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trem authored
The gpio api has been tested on an armadeus apf27. Signed-off-by:
Philippe Reynes <tremyfr@yahoo.fr> Acked-by:
Stefano Babic <sbabic@denx.de>
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Benoît Thébaudeau authored
gpio_get_value() should use PSR like Linux, not DR, because DR does not always reflect the pin state, while PSR does. This is especially useful to detect a short circuit on a GPIO pin configured as output, or to read the level of a pin controlled by a non-GPIO IOMUX function. Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by:
Stefano Babic <sbabic@denx.de>
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Allen Martin authored
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by:
Allen Martin <amartin@nvidia.com> Acked-by:
Stephen Warren <swarren@wwwdotorg.org> Tested-by:
Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
This SoC is used in the Raspberry Pi, for example. For more details, see: http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf . Initial support is enough to boot to a serial console, execute a minimal set of U-Boot commands, download data over a serial port, and boot a Linux kernel. No storage or network drivers are implemented. GPIO driver originally by Vikram Narayanan <vikram186@gmail.com> with many fixes from myself. Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org>
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Mathieu J. Poirier authored
Signed-off-by:
Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by:
John Rigby <john.rigby@linaro.org> Acked-by:
Tom Rini <trini@ti.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/gpio/Makefile
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Otavio Salvador authored
As the register accessing mode is the same for all i.MXS SoCs we ought to use 'mxs' prefix intead of 'mx28'. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Cc: Tom Rini <trini@ti.com> Acked-by:
Tom Rini <trini@ti.com> Signed-off-by:
Tom Rini <trini@ti.com>
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- Aug 08, 2012
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Nobuhiro Iwamatsu authored
Renesas SH and R-Mobile set up device using PFC. This provide the framework. Most codes were brought from linux kernel. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- Jul 07, 2012
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Stefan Roese authored
Tested on x600 (SPEAr600). Signed-off-by:
Stefan Roese <sr@denx.de>
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Bo Shen authored
Enable new PIO feature supported by Atmel SoC. Using CPU_HAS_PIO3 micro to enable PIO new feature. Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Tom Warren authored
In anticipation of Tegra3 support, continue removing/renaming Tegra2-specific files. No functional changes (yet). Updated copyrights to 2012. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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- May 15, 2012
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Timo Ketola authored
Signed-off-by:
Timo Ketola <timo@exertus.fi> Acked-by:
Stefano Babic <sbabic@denx.de>
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- Apr 16, 2012
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Vikram Narayanan authored
Return gpio_set_value in gpio_direction_output. Earlier it returned 0 and ignored gpio_set_value's return value. Signed-off-by:
Vikram Narayanan <vikram186@gmail.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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Vikram Narayanan authored
Use the defined GPIO_TO_PORT macro. Remove gpio >> 5 references. Signed-off-by:
Vikram Narayanan <vikram186@gmail.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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Vikram Narayanan authored
Add GPIO_TO_PORT macro in the mxc_gpio.c driver Signed-off-by:
Vikram Narayanan <vikram186@gmail.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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- Mar 26, 2012
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Robert Delien authored
This patch renames mx28_register to mx28_register_32 in order to prepare for the introduction of an 8-bit register, mx28_register_8. Signed-off-by:
Robert Delien <robert@delien.nl> Acked-by:
Marek Vasut <marex@denx.de> Tested-by:
Marek Vasut <marex@denx.de>
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- Mar 12, 2012
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Simon Glass authored
This provides a way of simulating GPIOs by setting values which are seen by the normal gpio_get/set_value() calls. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- Jan 10, 2012
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Joe Hershberger authored
Signed-off-by:
Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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Joe Hershberger authored
ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state Signed-off-by:
Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and extended to the new mxs_gpio.c. Signed-off-by:
Kim Phillips <kim.phillips@freescale.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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- Dec 09, 2011
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Jason Liu authored
Signed-off-by:
Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Acked-by:
Stefano Babic <sbabic@denx.de>
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