- Mar 07, 2010
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John Rigby authored
This is an i.MX25 base board with only NAND so it uses nand_spl to boot. Signed-off-by:
John Rigby <jcrigby@gmail.com> Tune configuration, add support for (redundant) environment in NAND. Signed-off-by:
Wolfgang Denk <wd@denx.de> Acked-by:
Wolfgang Denk <wd@denx.de> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>
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John Rigby authored
Use RMII for MX25 Add code to init gasket that enables RMII Signed-off-by:
John Rigby <jcrigby@gmail.com> CC: Ben Warren <biggerbadderben@gmail.com>
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John Rigby authored
general cleanup move clock init to cpu_eth_init in cpu/arm926ejs/mx27/generic.c make MX27 specific phy init conditional on CONFIG_MX27 replace call to imx_get_ahbclk with one to imx_get_fecclk and define imx_get_fecclk in include/asm-arm/arch-mx27/clock.h Signed-off-by:
John Rigby <jcrigby@gmail.com> CC: Ben Warren <biggerbadderben@gmail.com> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>
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John Rigby authored
ARM926EJS core with MX31 peripherals. Signed-off-by:
John Rigby <jcrigby@gmail.com> Earlier Version Signed-off-by:
Wolfgang Denk <wd@denx.de> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>
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John Rigby authored
remove ifdef'd clock selection code from serial_mxc.c and replace with call to imx_get_uartclk Add definitions for imx_get_uartclk to imx31 and imx27 include files. This makes it easier to add new imx platforms. Signed-off-by:
John Rigby <jcrigby@gmail.com>
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Stefano Babic authored
The patch adds initial support for the Freescale mx51evk board. Network (FEC) and SD controller (fsl_esdhc) are supported. Signed-off-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Fred Fan <fanyefeng@gmail.com>
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Stefano Babic authored
The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by:
Stefano Babic <sbabic@denx.de>
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Stefano Babic authored
Some Freescale's processors of different architecture have the same peripheral (eSDHC controller in PowerPC and i.MX51). This patch adds accessors for the internal registers of the SOCs, as already implemented in the PowerPC architecture. Signed-off-by:
Stefano Babic <sbabic@denx.de>
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Stefano Babic authored
Most controllers can check if there is a card in the slot. However, they require pins that could be not available because required by other functions and the detection of a card must be performed in another way. This patch adds a weak function that a board can implement to add its internal custom way to check the presence of a MMC/SD card. Signed-off-by:
Stefano Babic <sbabic@denx.de>
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Stefano Babic authored
Most cards do not answer if some reserved bits in the ocr are set. However, some controllers can set bit 7 (reserved for low voltages), but how to manage low voltages SD card is not yet specified. Signed-off-by:
Stefano Babic <sbabic@denx.de>
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Stefano Babic authored
The patch adds support for the Freescale mx51 processor. Signed-off-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Fred Fan <fanyefeng@gmail.com>
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Stefano Babic authored
The patch add header files to support the pin multiplexer of the the Freescale i.MX51 processor. Signed-off-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Fred Fan <fanyefeng@gmail.com>
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Stefano Babic authored
The patch add header files to support the Freescale i.MX51 processor, setting definitions for internal registers. Signed-off-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Fred Fan <fanyefeng@gmail.com>
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Stefano Babic authored
The patch add initial support for the Freescale i.MX51 processor (family arm cortex_a8). Signed-off-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Fred Fan <fanyefeng@gmail.com>
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Matthias Kaehlcke authored
edb93xx: Fix SDRAM initialization by issuing a precharge all command before forcing the precharge and select mode register update mode before programming the mode registers. Write to the SDRAM banks in order to force a precharge, reading causes the edb93xx boards to hang Signed-off-by:
Matthias Kaehlcke <matthias@kaehlcke.net>
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Anders Darander authored
Use AT91_GPBR 3 as a bootcount register. The bootmagic and the bootcount shares AT91_GPBR 3. Signed-off-by:
Anders Darander <ad@datarespons.se>
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Tom Rix authored
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit aea187c46f7d03ce985e55eb1398d0776a15b928 Signed-off-by:
Tom Rix <Tom.Rix@windriver.com>
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Matthias Kaehlcke authored
ep93xx: Refactoring of the timer code, including the following changes * use a free running timer instead of a periodical one * use unsigned long long for total number of ticks * hold the timer state in a structure instead of separate variables * increment the timer counter instead of decrementing it * remove unused function udelay_masked() * remove unused function set_timer() Signed-off-by:
Matthias Kaehlcke <matthias@kaehlcke.net>
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Matthias Kaehlcke authored
ep93xx: Use unsigned long long for calculation of sys ticks in clk_to_systicks() for proper handling of large intermediate values Signed-off-by:
Matthias Kaehlcke <matthias@kaehlcke.net>
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Siarhei Siamashka authored
725233: PLD instructions executed with PLD data forwarding enabled can result in a processor deadlock This deadlock can happen when NEON load instructions are used together with cache preload instructions (PLD). The problematic conditions can be triggered in-the-wild by NEON optimized functions from pixman library (http://cgit.freedesktop.org/pixman ), which perform dynamic adjustment of prefetch distance. The workaround disables PLD data forwarding by setting PLD_FWD bit in L2 Cache Auxiliary Control Register as recommended in ARM Cortex-A8 errata list. The deadlock can only happen on r1pX revisions of Cortex-A8 (used in OMAP34xx/OMAP35xx). Performance impact of the workaround is practically non-existant. Signed-off-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Achim Ehrlich authored
Configuration defines should be preceeded with CONFIG_SYS_. Renamed some at91 specific defines to conform to this naming convention: AT91_CPU_NAME to CONFIG_SYS_AT91_CPU_NAME AT91_MAIN_CLOCK to CONFIG_SYS_AT91_MAIN_CLOCK Signed-off-by:
Achim Ehrlich <aehrlich@taskit.de>
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Ladislav Michl authored
linking eeprom with libgeneric.a is not really needed and causes following error: ../../lib_generic/libgeneric.a(string.o): In function `strcmp': /home/ladis/src/u-boot-ti/lib_generic/string.c:152: multiple definition of `strcmp' ../../examples/standalone/libstubs.a(stubs.o):include/_exports.h:24: first defined here make[1]: *** [eeprom.srec] Error 1 Fix undefined reference to memset generated by some versions of gcc to zero out initialized structure on the stack: eeprom.o: In function `eeprom': board/voiceblue/eeprom.c:152: undefined reference to `memset' make[1]: *** [eeprom] Error 1 Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ladislav Michl authored
Reindent configuration header to limit line lenght to 80 characters by removing obvious and sometimes misleading comments. Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ladislav Michl authored
Limit line length to 80 characters mostly by removing obvious and sometimes misleading comments. Fix indentation, too. Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Sandeep Paulraj authored
The patch adds an entry for the DM365 EVM to MAKEALL Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Nick Thompson authored
Adds support for ethernet networking on the da830evm platform. This platform uses an SoC EMAC interface and a 3 port ethernet switch as a PHY with an RMII interface. The PHY also has a i2c interface for configuring the switch functions. Signed-off-by:
Nick Thompson <nick.thompson@ge.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ladislav Michl authored
Recent kernels are using generic NAND and NOR drivers. Change default mtdparts to reflect it. Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ladislav Michl authored
Correct switching partitions after upgrade and make it more readable. Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ladislav Michl authored
linking eeprom with libgeneric.a is not really needed and causes following error: ../../lib_generic/libgeneric.a(string.o): In function `strcmp': lib_generic/string.c:152: multiple definition of `strcmp' ../../examples/standalone/libstubs.a(stubs.o):include/_exports.h:24: first defined here Remove eeprom linker script as well and generate entry point object (to start application by jumping on its beginning) on the fly. Out-of-tree build tested as well. Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ladislav Michl authored
Use shorter yet descriptive messages, replace printf() with puts() where appropriate. This saves few bytes. Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ladislav Michl authored
Defining partially initialized struct eth_device on stack means gcc has to zero out it, and some gcc versions optimize this with an implicit call to memset. Move definition to data section to avoid that (it has also nice side effect that we need not to pass it to helper functions anymore) Signed-off-by:
Ladislav Michl <ladis@linux-mips.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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- Mar 04, 2010
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git://git.denx.de/u-boot-shWolfgang Denk authored
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Wolfgang Wegner authored
For platforms with flash below ram addresses, the current check to activate monitor protection is wrong/insufficient. This patch fixes CONFIG_MONITOR_IS_IN_RAM for these systems by adding a check for this configuration. Signed-off-by:
Wolfgang Wegner <w.wegner@astro-kom.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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Wolfgang Wegner authored
CONFIG_MONITOR_IS_IN_RAM is broken for MCF532x. This patch fixes this by conditionally - removing the vector table at the beginning of code - not overwriting the vector base register - removing the code to re-set the PLL, which effectively disables SDRAM access Signed-off-by:
Wolfgang Wegner <w.wegner@astro-kom.de>
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Richard Retanubun authored
This patch adds a board_reset function to allow boards to specify their own custom reset sequence (e.g. resetting by timing out watchdog). Tested only on MCF5271, can be expanded if needed. Based on Mike Frysinger's suggestion on: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/70304 Signed-off-by: Richard Retanubun <RichardRetanubun at RuggedCom.com>
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Wolfgang Wegner authored
in cpu/mcf532x/start.S, the function icache_enable enables the cache for a fixed 32MB region starting at the SDRAM start address; this patch changes the function to cover the region defined by CONFIG_SYS_SDRAM_SIZE Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>