- Oct 27, 2011
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Chandan Nath authored
This patch adds basic support for booting the board. This patch adds support for the UART necessary to get to the u-boot prompt. Signed-off-by:
Chandan Nath <chandan.nath@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Chandan Nath authored
This patch adds timer support for AM33xx platform. Signed-off-by:
Chandan Nath <chandan.nath@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Chandan Nath authored
This patch adds AM33xx emif/ddr support along with board specific defines. Signed-off-by:
Chandan Nath <chandan.nath@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Chandan Nath authored
This patch adds basic clock definition of am33xx SoC. Signed-off-by:
Chandan Nath <chandan.nath@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Chandan Nath authored
This patch adds basic support for AM33xx which is based on ARMV7 Cortex A8 CPU. Signed-off-by:
Chandan Nath <chandan.nath@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ilya Yanok authored
Fix EMIF4 registers definition. Signed-off-by:
Ilya Yanok <yanok@emcraft.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Manjunath Hadli authored
remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM as they are no longer needed with the support for more than 1 PHYs in davinci emac driver. Signed-off-by:
Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Manjunath Hadli authored
add support for more than 1 PHYs. Many of the davinci platforms have more than 1 PHYs on thier board. This patch extends support in davinci emac driver for upto 3 PHYs. Signed-off-by:
Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by:
Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Manjunath Hadli authored
add more features like DUPLEX, 100MB link speed etc to auto negotiate in EMAC driver. EMAC controller autonegotiates for these features with PHYs which are on the board. Signed-off-by:
Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by:
Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Christian Riesch authored
Since commit f1d2b313 the serial port of the da850evm is accessed before the UART2 peripheral of the SoC is powered on in the function board_init() in board/davinci/da8xxevm/da850evm.c. When u-boot is used in conjunction with the UBL (user boot loader, see doc/README.davinci) on this board, the UART2 peripheral is already turned on by UBL at the time u-boot is started. Hence, the wrong initialization sequence is not noticed by most users. However, if UBL is not used, u-boot must power on the peripheral before using it. This patch adds a board_early_init_f() function for the LPSC configuration to the da850evm board configuration. Signed-off-by:
Christian Riesch <christian.riesch@omicron.at> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Joe Hershberger authored
Enable the gpio command Signed-off-by:
Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Joe Hershberger authored
gpio_free() should not have the side effect of setting the line to input since this prevents the gpio command from being able to set a line as output. Signed-off-by:
Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Tom Rini authored
Not all omap families define OMAP_HSMMC[23]_BASE so condition those cases in omap_mmc_init(). Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by:
Tom Rini <trini@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Philip Balister authored
This allows the user can easily add extra kernel arguments. Very helpful for reserving memory for the DSP without rewriting the entire kernel argument line. Signed-off-by:
Philip Balister <philip@opensdr.com> Tested-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Philip Balister authored
By moving the CS4 configuration into the board specific configuration, it is left free for custom carrier boards. The USRP-E1XX series uses CS4 to control access to an FPGA, so without this patch the device driver cannot claim CS4. Signed-off-by:
Philip Balister <philip@opensdr.com> Tested-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Philip Balister authored
Starting with kernel 2.6.37, the serial ports on the OMAP3 are called ttyOX, not ttySX. Signed-off-by:
Philip Balister <philip@opensdr.com> Tested-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Manjunath Hadli authored
Add support for enabling NAND boot mode in configuration file and add correspanding pinmux support, nand initialize function in board file. The size required for environment variables not more than 10KB the CONFIG_ENV_SIZE is set to 10KB from (512 << 10). Acked-by:
Nick Thompson <nick.thompson@ge.com> Signed-off-by:
Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by:
Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Manjunath Hadli authored
revert commit 98c19aff as the disabling of cache need not be done explicitly. Subsequent patches to new cache management framework has fixed it. EMAC issue with cache coherency still exists when cahces are enabled. Signed-off-by:
Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Manjunath Hadli authored
revert commit 913a39e9 as the disabling of cache need not be done explicitly. Subsequent patches to new cache management framework has fixed it. EMAC issue with cache coherency still exists when cahces are enabled. Signed-off-by:
Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Tom Rini authored
With malloc support being a new requirement for all ARM SPL implementations, define a small area for use on devkit8000. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by:
Tom Rini <trini@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Aneesh V authored
FAT library now uses malloc() and free(). But SPL doesn't have heap until now. Setup a heap in SDRAM to fix this issue. However this increases SPL footprint beyond the available SRAM budget. So, compile out some fancy features in the SDARM init bring back footprint under control CC: Sandeep Paulraj <s-paulraj@ti.com> CC: Wolfgang Denk <wd@denx.de> Signed-off-by:
Aneesh V <aneesh@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Tom Rini authored
We add an weak version of omap_rev_string in omap-common/spl.c and while at it drop the omap3 version. Move the prototype over to <asm/omap_common.h> with the other SPL functions. Signed-off-by:
Tom Rini <trini@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
Signed-off-by:
Steve Sakoman <steve@sakoman.com> Acked-by:
Koen Kooi <k-kooi@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
The level shifters used on the Caspa camera module have a 4k output impedance. Combined with the 100uA pull-up resistors in the OMAP3, this raises the ground level to 400mV. Adding crosstalk between the pixel clock and the HS/VS signals on the flat cable (a ground line in between would have been nice), logic 0 levels can raise up to 650mV. This exceeds the camera input pins VIL maximum voltage. This change suggested-by Laurent Pinchart Signed-off-by:
Steve Sakoman <steve@sakoman.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Steve Sakoman authored
This pad was previously configured for sysclkout_1. This patch changes the configuration to gpio_10 to reduce radiated noise from the 26Mhz clock, as well as make the pin more generally useful. Signed-off-by:
Steve Sakoman <steve@sakoman.com> Acked-by:
Philip Balister <philip@opensdr.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Simon Schwarz authored
Adding a DMA library to the SPL. It is used if CONFIG_SPL_DMA_SUPPORT is defined. Signed-off-by:
Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Simon Schwarz authored
Adds an interface to use the OMAP3 DMA. Signed-off-by:
Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Simon Schwarz authored
Adding the register definitions for omap3 DMA controller to cpu.h Signed-off-by:
Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Simon Schwarz authored
Adding the base register address of OMAP3 DMA controller. Signed-off-by:
Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Heiko Schocher authored
Signed-off-by:
Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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SRICHARAN R authored
All ddr configurations(geometry/timings) are done automatically by detecting the device connected at run time. Though this is a useful feature, making this as a default setting increases the code size by about 2K bytes. This is quite big, especially in the case of SPL which runs from a smaller SRAM. So do not use this feature as the default setting, instead use the precalculated tables. Signed-off-by:
sricharan <r.sricharan@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Sergei Shtylyov authored
MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix the mask which previously was leaving out the intermediate state indicator bit. While at it, introduce two #define's for that mask -- unfortunately, we can't use a single #define as the assembly code can't include <asm/arch/hardware.h> due to C-specfic constructs in it. Signed-off-by:
Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ricardo Salveti de Araujo authored
Not all padconfs are the same between 4430 and 4460, so instead of working around this with an if, we should have an specific padconf structure for both chips (like handling the differences between the LEDs GPIOs and TPS). Signed-off-by:
Ricardo Salveti de Araujo <ricardo.salveti@linaro.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ricardo Salveti de Araujo authored
Signed-off-by:
Ricardo Salveti de Araujo <ricardo.salveti@linaro.org> 2 files changed, 17 insertions(+), 1 deletions(-) Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ricardo Salveti de Araujo authored
OMAP4460 has a different set of values for the ID code, so moving the old ones to be related just with 4430. Signed-off-by:
Ricardo Salveti de Araujo <ricardo.salveti@linaro.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Prafulla Wadaskar authored
Signed-off-by:
Prafulla Wadaskar <prafulla@marvell.com>
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Michael Walle authored
The spi_init() function is missing. Add it. Signed-off-by:
Michael Walle <michael@walle.cc>
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Lei Wen authored
Build pass with following config: dkb_config aspenite_config Signed-off-by:
Lei Wen <leiwen@marvell.com>
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Lei Wen authored
For files like the drivers/serial/serial.c, it must include the platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the definition in the platform definition files. Include the platform definition file in the config file, so that it would decouple the dependence for the driver files. Signed-off-by:
Lei Wen <leiwen@marvell.com>
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Lei Wen authored
Build pass with following config: dkb_config aspenite_config edminiv2_config openrd_ultimate_config sheevaplug_config mv88f6281gtw_ge_config rd6281a_config guruplug_config km_kirkwood_config Signed-off-by:
Lei Wen <leiwen@marvell.com> Acked-by:
Wolfgang Denk <wd@denx.de>
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