- Feb 07, 2015
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Heiko Schocher authored
if CONFIG_AT91SAM9_WATCHDOG is set, do not disable WDT in SPL Signed-off-by:Heiko Schocher <hs@denx.de>
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Wu, Josh authored
This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of saving it in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by:
Josh Wu <josh.wu@atmel.com> Acked-by:
Bo Shen <voice.shen@atmel.com>
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Wu, Josh authored
This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by:
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Wu, Josh authored
This patch will save U-Boot environment as a file: uboot.env, in FAT partition instead of saving it in raw sector of MMC card. This make us easier to manage the environment file. Signed-off-by:
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Wu, Josh authored
Current the MMC support will enable MCI port A, Which is only exist for 2mmc board. So by default we need to disable MMC (port A) support. And only enable it for 2mmc board. Otherwise, dataflash won't work in at91sam9260ek board as MMC has confliction with Dataflash in the CLK pin. Signed-off-by: -
Wu, Josh authored
As the PMECC hardware has different version. In SAMA5D4 chip, the PMECC ip can generate 0xff pmecc ECC value for all 0xff sector. According to this, add PMECC version check, if it's SAMA5D4 then we always let PMECC hardware to correct it. Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Bo Shen authored
As the at91cap9adk board is removed by commit: b5508344 (ARM: remove broken "at91cap9adk" board), so the at91cap9 code is not used anymore, and also the document for at91cap9 can not be found on www.atmel.com, so remove the at91cap9 related code. Signed-off-by:
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Bo Shen authored
Signed-off-by: -
Bo Shen authored
The sama5d4ek support boot up from NAND flash, SD/MMC card and also the SPI flash. Signed-off-by: -
Bo Shen authored
Signed-off-by: -
Bo Shen authored
The SAMAA5D4 SoC can access DDR in interleave mode. Signed-off-by: -
Bo Shen authored
Signed-off-by:
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Bo Shen authored
Signed-off-by: -
Bo Shen authored
Signed-off-by: -
Bo Shen authored
The SAMA5D4 SoC on chip rc oscillator can not be disabled. Signed-off-by: -
Bo Shen authored
Some SoC need to redirect the saic to aic to make the interrupt to work, here add a weak function to be replaced by real function. Signed-off-by: -
Bo Shen authored
Some SoC need to configure the bus matrix, add an weak function to be replace by real function. Signed-off-by: -
Bo Shen authored
The SFR (special function registers) can be shared bwteen sama5d3 and sama5d4 soc. Signed-off-by:
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Bo Shen authored
This matrix header file can be shared between sama5d3 and sama5d4 soc. Signed-off-by:
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Bo Shen authored
Signed-off-by:
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- Feb 04, 2015
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git://git.denx.de/u-boot-ubiTom Rini authored
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- Feb 02, 2015
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Tom Rini authored
Signed-off-by:Tom Rini <trini@ti.com>
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git://git.denx.de/u-boot-tiTom Rini authored
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git://git.denx.de/u-boot-sunxiTom Rini authored
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Siarhei Siamashka authored
This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Siarhei Siamashka authored
This patch allows to configure all the important DRAM parameters in Kconfig. Signed-off-by:
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Siarhei Siamashka authored
In addition to the current Android magic settings, allow to optionally use DDR3 timing parameters, which are tailored for different clock frequencies and JEDEC speed bins. This should improve reliability and performance. Adding '+S:CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H=y' to the board defconfig allows to use timings, which are calculated for the DDR3-1066F speed bin. A lot of DDR3 chips, which are used in real Allwinner based devices, support DDR3-1066F speed bin timings. And adding '+S:CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y' should work with any DDR3 chips, because this targets the slowest JEDEC speed bins. The vendor magic values are still used by default for DRAM, but board maintainers now have more flexibility in DRAM timings selection. Signed-off-by:
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Hans de Goede authored
On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an unstable image when active low v or hsync is used. The problem seems to be specific to the OLinuxIno A13 (normal & micro) boards. I've just looked up the schematics and they use an opendrain driver for the vga sync lines, and with sync pulses it is the logical high->low edge of the pulse which counts for the timing, which with an active low sync is being driven by the pull-up, and that simply seems to not drive it hard enough to get a stable image. So force v and hsync active high on these boards. independent of what the modeline says. This fixes the unstable image. Signed-off-by:
Ian Campbell <ijc@hellion.org.uk>
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Michal Suchanek authored
Signed-off-by:
Michal Suchanek <hramrach@gmail.com> Acked-by:
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Paul Kocialkowski authored
Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Acked-by:
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Adam Sampson authored
This is a low-cost Allwinner A20 board with Arduino-style GPIO headers; it features 1G RAM, 4G NAND flash, 1 micro-SD, 2 USB sockets, 1 micro USB socket for OTG and another for power in, HDMI, SATA, 5V power for SATA devices, gigabit Ethernet, an IR receiver, 3.5mm audio out and a MIPI camera connector. Like the BananaPi, this board needs GMAC_TX_DELAY set to 3 in order for GMAC to work reliably at gigabit speeds. For more details, see: http://linux-sunxi.org/LinkSprite_pcDuino3_Nano Signed-off-by:
Adam Sampson <ats@offog.org> Acked-by:
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Hans de Goede authored
Keep all entries except for the monster entry at the top alphabetically sorted. Signed-off-by: -
Hans de Goede authored
It turns out that the device_mode_data is rsb specific, rather then slave specific, so integrate the rsb_set_device_mode() call into rsb_init(). Signed-off-by:
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Hans de Goede authored
Add support for the A80 to the rsb code. Signed-off-by:
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Hans de Goede authored
CONFIG_TARGET_FOO was only used in board/sunxi/Makefile to select the dram config for sun5i and sun7i boards and in board/sunxi/gmac.c for some special handling of the bananapi/bananapro (both sun7i), all sun5i and sun7i boards have been moved over to using a single dram_sun5i_autoconfig file, and the tx clk delay handling for the Banana boards now has its own Kconfig. IOW nothing is using CONFIG_TARGET_FOO anymore, so remove it. Signed-off-by:
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Hans de Goede authored
And use this to set the GMAC Transmit Clock Delay Chain value on Banana boards, rather then keying of CONFIG_TARGET_FOO. Signed-off-by:
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Hans de Goede authored
Currently we've separate detailed dram settings for all sun5i boards, this moves them over to using auto dram configuration so that we can get rid of all the per board dram_foo.c files. This has been tested on a A10s-Olinuxino, A13-Olinuxino, A13-OlinuxinoM, mk802-a10s and r7-tv-dongle board. Signed-off-by:
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Hans de Goede authored
USB1_VBUS is not used, and USB2_VBUS uses the pin normally used to control USB1_VBUS. Signed-off-by: -
Hans de Goede authored
We do not need i2c support in the SPL when there is no PMIC (some sun4i boards), or when the PMIC is not using i2c such as on sun6i and sun8i. This reduces the SPL size from (e.g.) 21812 to 19260 bytes. Signed-off-by:
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