- Jun 11, 2015
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Simon Glass authored
We plan to enable device tree in SPL by default. Before doing this, explicitly disable it for all boards. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
The 4KB padding doesn't seem necessary since we don't normally adjust the control device tree file within U-Boot. Also drop the memory table space. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
This option is used by some boards, so support it with driver model. This is really ugly - we should rewrite this driver once all users are moved to driver model. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
For 16-bit-per-pixel displays it is useful to support 8 bit-per-pixel images to reduce image size. Add support for this when drawing BMP images. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
We try to avoid typedefs and these ones are easy enough to remove. Before changing this header in the next patch, remove the typedefs. Signed-off-by:
Simon Glass <sjg@chromium.org> Suggested-by:
Joe Hershberger <joe.hershberger@gmail.com> Acked-by:
Joe Hershberger <joe.hershberger@ni.com>
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Simon Glass authored
Support this function so we can use Chrome OS verified boot with sandbox. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
This function is used before jumping to U-Boot, but in that case we don't always want to disable caches. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Vadim Bendebury <vbendeb@chromium.org>
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Simon Glass authored
For secure boot systems it is common to have a read-only U-Boot which starts the machine and jumps to a read-write U-Boot for actual booting the OS. This allows the read-write U-Boot to be upgraded without risk of permanently bricking the machine. In the event that the read-write U-Boot is corrupted, the read-only U-Boot can detect this with a checksum and boot into a recovery flow. To support this, add a way to detect when U-Boot is run from SPL as opposed to some other method, such as booted directly (no SPL) or started from another source (e.g. a primary U-Boot). This works by putting a special value in r0. For now we rely on board-specific code to actually check the register and set a flag. At some point this could be generalised, perhaps by using a spare register and passing a flag to _main and/or board_init_f(). This commit does not implement any feature, but merely provides the API for boards to implement. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Support this function with driver model also (CONFIG_DM_USB). Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Somehow this change was dropped in the various merges. I noticed when I came to turn off the non-driver-model support for Tegra. We need to make this change (and deal with any problems) before going further. Change-Id: Ib9389a0d41008014eb0df0df98c27be65bc79ce6 Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Marek Vasut <marex@denx.de>
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Simon Glass authored
Add the legacy i2c_reg_read/write() functions to the compatibility layer so that they can be used when CONFIG_DM_I2C_COMPAT is defined. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Heiko Schocher <hs@denx.de>
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- Jun 10, 2015
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http://git.denx.de/u-boot-sunxiTom Rini authored
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Bernhard Nortmann authored
Due to absence of CONFIG_SYS_64BIT_LBA, u-boot-sunxi currently has no support for the (GPT) partioning scheme of large disks > 2TB. While the AHCI driver seems to handle this nicely, the problem is that lbaint_t values get truncated to 32-bit. This patch sets CONFIG_SYS_64BIT_LBA from sunxi_common.h for all SoCs that support AHCI (CONFIG_SUNXI_AHCI). Signed-off-by:
Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Hans de Goede authored
This fixes ethernet no longer working on boards which use a gpio to enable the phy. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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git://git.denx.de/u-boot-avr32Tom Rini authored
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Andreas Bießmann authored
Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Andreas Bießmann authored
I have this board at work, so I can trun tests on it. Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Andreas Bießmann authored
Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Andreas Bießmann authored
Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Andreas Bießmann authored
Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Andreas Bießmann authored
Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Andreas Bießmann authored
Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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- Jun 09, 2015
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Simon Glass authored
We need to match the device tree in the FIT with the U-Boot model so we can automatically select the right device tree. Also adjust the load address so that the device tree is not in the way when a zImage kernel tries to extract itself. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
With the rename the MAINTAINER file was not updated. Fix it and the 'Chrombook' typo in Kconfig. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
Bring these in if they are provided by the board. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
We need to turn on all audio-related clocks for the Chrome OS kernel to boot. Otherwise it will hang when trying to enable audio. Also for Linux set up graphics driver video protection. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
Add a hook to allows boards to add their own init to board_init(). Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
Use the correct function for clock init. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
When setting up large environment variables we can exceed 16 arguemnts. Increase this to avoid problems. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
There are some missing entries in the tables. Add them. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
This is required in order to avoid instability when running from caches after the kernel starts. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
A harmless but confusing warning is displayed when looking up the DisplayPort PLL. Correct this. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
Add a simple function to enable external clocks. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
Use the oscillator as the source clock when we cannot achieve a low-enough speed with the peripheral clock. This happens when we request 3MHz on a SPI clock, for example. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
Enable the EC and keyboard, using the SPI bus. The EC driver requires a particular format and a deactivation delay. Also U-Boot does not support interrupts. For now, adjust the device tree to comply. At some point we should tidy this up to support interrupts and make tegra and exynos use the same setup. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
At present the driver does not properly honour the requested SPI CS deactivation delay since the SPI bus is changed in the claim_bus() method. Everything the claim_bus() method does can be done when the device is probed (setting the speed and mode) and at the start of a new transfer (where the fifo_status is already cleared). So drop this method. Also, until the delay is complete, we should not touch the bus, so make sure that spi_cs_activate() is called before other things are done in the xfer() method. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Simon Glass authored
This requires a change to stdin to include the 'cros-ec-keyb' input device. Put this in the common file, enabled by the relevant CONFIG. Signed-off-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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- Jun 08, 2015
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@konsulko.com>
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Adam YH Lee authored
AM335x-based 'Gumstix Pepper' SBCs and variants use different types of RAM (DDR2 vs DDR3 with DDR3 being the default). Detect the board type by reading the factory-programmed EEPROM [1] and use this to select any runtime boot options such as RAM type. [1] http://elinux.org/BeagleBoardPinMux#List_of_Vendor_and_Device_IDs Signed-off-by:
Adam YH Lee <adam.yh.lee@gmail.com> Signed-off-by:
Ash Charles <ashcharles@gmail.com>
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Stefan Roese authored
This patch adds the feature to only stop the autobooting, and therefor boot into the U-Boot prompt, when the input string / password matches a values that is encypted via a SHA256 hash and saved in the environment. This feature is enabled by defined these config options: CONFIG_AUTOBOOT_KEYED CONFIG_AUTOBOOT_STOP_STR_SHA256 Signed-off-by:
Stefan Roese <sr@denx.de> Reviewed-by:
Simon Glass <sjg@chromium.org>
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