- Jul 31, 2013
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Axel Lin authored
Use DIV_ROUND_UP to simplify the code. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com>
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Axel Lin authored
Current code uses gd->baudrate before setting its value. Besides, I got below build warning which is introduced by commit ddb5c5be "blackfin: add baudrate to bdinfo". board.c:235:3: warning: passing argument 1 of 'simple_strtoul' makes pointer from integer without a cast [enabled by default] include/vsprintf.h:27:7: note: expected 'const char *' but argument is of type 'unsigned int' This patch ensures we get the baudrate setting before using it. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com>
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Axel Lin authored
The function return from P_FUNCT2MUX(per) takes 2 bits, however for BF537_FAMILY with offset != 1 the function is 1 bit. Also has small refactor for better readability. In portmux_setup(), it looks odd having "muxreg &= ~(3 << 1);" while in current code we do muxreg |= (function << offset);. Signed-off-by:
Axel Lin <axel.lin@ingics.com>
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Axel Lin authored
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com>
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Axel Lin authored
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com>
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- Jul 30, 2013
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Masahiro Yamada authored
This commit adds some prototypes into include/mtd/cfi_flash.h. These functions are defined with a weak attribute in drivers/mtd/cfi_flash.c. This means they can be overrided by board-specific ones if necessary. When defining such functions under board/ directory or somewhere, cfi_flash.h should be included. This makes sure that board-specfic cfi functions are defined in a correct prototype. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jul 26, 2013
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@ti.com>
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- Jul 25, 2013
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Dirk Eibach authored
CONFIG_SYS_FLASH_PROTECTION was active on most gdsys boards by default, while hardware flash protection was not implemented. Hardware support was added recently and we get into trouble because backward compatibility is broken (u-boot can't unprotect the protected flash after a downgrade). So we decided to disable hardware flash protection for all our boards. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
OSD size was constant 32x16 characters. Now the size is set as announced by the FPGA. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
mclink is a serial interface for communication between gdsys FPGA. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
A set of accessor functions was added to be able to access not only memory mapped FPGA in a generic way. Thanks to Wolfgang Denk for getting this sorted properly. Signed-off-by:
Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by:
Stefan Roese <sr@denx.de>
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Kuo-Jung Su authored
While the flash_detect_legacy() of drivers/mtd/cfi_flash.c feed unmap_physmem() with MAP_NOCACHE as 2nd parameter, the do_spi_flash_read_write() of common/cmd_sf.c feed unmap_physmem() with the length of the mapped buffer as 2nd parameter. It's apparently a bug, and I personally think the 2nd parameter should be the length of the mapped buffer. Signed-off-by:
Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert Aribaud <albert.u.boot@aribaud.net> CC: Stefan Roese <sr@denx.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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git://git.denx.de/u-boot-nds32Tom Rini authored
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@ti.com>
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git://git.denx.de/u-boot-mipsTom Rini authored
Conflict over SPDX changes means that one change was effectively dropped as it was fixing typos in a removed hunk of text. Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by:
Tom Rini <trini@ti.com>
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Tom Rini authored
Acked-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Tom Rini <trini@ti.com>
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ken kuo authored
Some version of Andes core support FPU coprocessor, if this is the case, and toolchain support FPU instruction set, we should enable it at low level initialization time. Signed-off-by:
Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@ti.com>
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ken kuo authored
Signed-off-by:
Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
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- Jul 24, 2013
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Gabor Juhos authored
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Make it similar to the code in mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Make it similar to the code in mips64/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Synchronize the code with mips64/start.S, in order to allow further unifications. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
The t4 register already holds the cache line size, and the value of the register is not changed in mips_init_icache. Get the cache line size value from t4 for mips_init_dcache as well and remove the superfluous assignment of t5 register. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org>
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Gabor Juhos authored
The MIPS code uses centralized u-boot.lds script already, and dynamic relocation is supported as well. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Nothing is used from asm/mipsregs.h. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Checking mips32/time.c with checkpatch.pl shows this: arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required total: 1 errors, 1 warnings, 0 checks, 85 lines checked Fix the code to make checkpatch.pl happy. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Qemu emulates a PCNET PCI card for the Malta CoreLV board. Enable the pcnet driver and add board specific ethernet initialization function to bring it up. Also enable the CONFIG_CMD_NET and CONFIG_CMD_PING options. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Qemu emulates the Galileo GT64120 System Controller which provides a CPU bus to PCI bus bridge. The patch adds driver for this bridge and enables PCI support for the emulated Malta board. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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Gabor Juhos authored
Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by:
Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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