- Jan 24, 2014
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Nishanth Menon authored
Patch adds modification to shared omap5 abb_setup() function, and proper registers definitions needed for ABB setup sequence. ABB is initialized for MPU voltage domain at OPP_NOM. Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Nishanth Menon authored
ES1.1 silicon is a very minor variant of ES1.0. Add priliminary support for ES1.1 IDCODE change. Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Satyanarayana, Sandhya authored
This patch enables dynamically powering down the IO receiver when not performing a read on boards using DDR3. This optimizes both active and standby power consumption. This bit is not set on EVM SK and EVM 1.5 and later boards. Setting the same. This has been tested on PG2.0 EVM1.5, EVM1.2, EVM-SK, BBB. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
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Lokesh Vutla authored
This patch enables dynamically powering down the IO receiver when not performing a read on DDR3 board. This optimizes both active and standby power consumption. This is derived from a patch that is done on AM335x[1] [1] http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=6a9ee4bc72ece53fabf01825605fba3d71d5feb2 Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Enric Balletbò i Serra authored
To reduce code duplication update omap3_igep00x0.h to use ti_omap3_common.h. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com>
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Enric Balletbò i Serra authored
Create a new file, include/configs/ti_omap3_common.h, for everything common to the OMAP3 SoC leaving just the board specific part to board configuration file. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com>
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Enric Balletbò i Serra authored
Other TI processors like am33xx, omap4 and omap5 have called these variables as NON_SECURE_SRAM_*, shouldn't be a big problem rename these variables to be coherent. One reason more to rename these variables is to have the possibility of any OMAP3 board to use the ti_armv7_common.h include as the NON_SECURE_SRAM_END is used to define the CONFIG_SYS_INIT_SP_ADDR variable. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com>
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Enric Balletbò i Serra authored
If CONFIG_NR_DRAM_BANKS is not defined, we say (for simplicity) that we have 1 bank, but for some boards should be interesting that we can define CONFIG_NR_DRAM_BANKS. To handle this possibility just define the number of DRAM banks if is not already defined. This is useful for some OMAP3 boards where the DRAM initialitzation is only at u-boot level. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com>
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Enric Balletbò i Serra authored
The ELM hardware engine wihich is used for ECC error detections is not present on OMAP3 SoC, so move the CONFIG_SPL_NAND_AM33XX_BCH from ti_armv7_common.h to SoC configuration file. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Enric Balletbò i Serra authored
Follow the pattern ti_<processor family>_common.h used by other TI processors to be coherent. So just rename omap5_common.h to ti_omap5_common.h. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Enric Balletbò i Serra authored
Follow the pattern ti_<processor family>_common.h used by other TI processors to be coherent. So just rename omap4_common.h to ti_omap4_common.h. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@ti.com>
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Jassi Brar authored
The commit f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls" removed the config option aimed towards moving that stuff into kernel, which renders some code unreachable. Remove that code. Signed-off-by:
Jassi Brar <jaswinder.singh@linaro.org>
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Jassi Brar authored
The commit f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls" removed the config option aimed towards moving that stuff into kernel, which renders some code unreachable. Remove that code. Signed-off-by:
Jassi Brar <jaswinder.singh@linaro.org>
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- Jan 15, 2014
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Nobuhiro Iwamatsu authored
This supports SH-QSPI device on koelsch board, and enable booting from SPI flash. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Nobuhiro Iwamatsu authored
This supports SH-QSPI device on lager board, and enable booting from SPI flash. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Nobuhiro Iwamatsu authored
Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reviewed-by:
Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Nobuhiro Iwamatsu authored
This adds base register address of SH QSPI. Currently, SH QSPI is used only from R8A7790 and R8A7791. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Nobuhiro Iwamatsu authored
On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel and other. This disables TMU0 at the request of from kernel user. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Nobuhiro Iwamatsu authored
On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel and other. This disables TMU0 at the request of from kernel user. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Albert ARIBAUD authored
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Fabio Estevam authored
SolidRun has designed the Hummingboard board based on mx6q/dl/solo. Add the initial support for the mx6 solo variant. More information about this hardware can be found at: http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware (Carrier-One was the previous name of Hummingboard). Based on the work from Jon Nettleton <jon.nettleton@gmail.com>. Signed-off-by:
Jon Nettleton <jon.nettleton@gmail.com> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Provide an argument to enable_fec_anatop_clock() to specify the clock frequency that will be generated. No changes are made to mx6slevk, which uses the default 50MHz fec clock. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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- Jan 14, 2014
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Andreas Bießmann authored
Building some arm boards with older binutils may produce errors like this: ---8<--- crt0.S: Assembler messages: crt0.S:70: Error: register expected, not '#(184)' -- `sub sp,#(184)' --->8--- Use canonical version of the subtract mnemonic to avoid those issues. Reported-by:
Alexey Smishlayev <alexey@xtech2.lv> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Albert ARIBAUD authored
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Albert ARIBAUD authored
Some targets will build fine but not boot if sections .hash and .got.plt are not present in the binary. Add them back. Also, Exynos machines require .machine_param section in SPL. Add it. Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by:
Rajeshwari S Shinde <rajeshwari.s@samsung.com>
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Albert ARIBAUD authored
Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by:
Stefano Babic <sbabic@denx.de>
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Albert ARIBAUD authored
Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by:
Minkyu Kang <mk7.kang@samsung.com>
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- Jan 13, 2014
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Marek Vasut authored
Access the OneNAND 1KiB window on the VPAC270 as an SRAM instead of accessing it as a burst-RAM. This fixes a problem where the board failed to reboot sometimes as the CPU couldn't start executing from the OneNAND 1KiB window. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
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Marek Vasut authored
The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation, where we have only the first 1KiB of the OneNAND available upon power-up as a memory-mapped area, from which the CPU starts executing, we place only the most essential code into this first 1KiB . This code copies the rest of the SPL into SRAM and jumps to it. This code is stored in section .text.0 . The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on the SPL, it will preserve only .text section, but the .text.0 and .text.1 are stripped away from the result, thus making the SPL binary empty. The patch adds additional -j parameters to the OBJCOPY for PXA during the SPL build, which will preserve the .text.0 and .text.1 sections. Moreover, this patch also adds missing functions into the .text.0 section, since otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
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Fabio Estevam authored
Include "mx6_common.h" so that some ARM errata are applied and also the vddsoc regulator can be changed. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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Christian Gmeienr authored
Commit 762a88cc introduces a 64-bit division without using the lldiv() function, which pulls in previously unused libgcc stuff. Signed-off-by:
Måns Rullgård <mans@mansr.com> Signed-off-by:
Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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John Weber authored
Change the default environment to use zImage instead of uImage, this requires changes to the default environment to load a file named zImage instead of uImage, and to use the 'bootz' command instead of 'bootm' when booting the kernel. The zImage works for FSL Linux's kernel fork versions 3.0.35, 3.10.9, and 3.10.17; this also works fine for mainline kernels. Signed-off-by:
John Weber <rjohnweber@gmail.com> Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br>
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Otavio Salvador authored
A new 'update_emmc_firmware' target is added to allow for easy U-Boot update in the eMMC as it has secury boot partition and this needs specific handling on how to program the specific partition. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br>
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Fabio Estevam authored
There is no need to print an error message when cpu_eth_init() fails because net/eth.c already prints it. In order to simplify the code, just return the value from cpu_eth_init(bis) directly. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
There is no need to print an error message when cpu_eth_init() fails because net/eth.c already prints it. In order to simplify the code, just return the value from cpu_eth_init(bis) directly. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
There is no need to print an error message when cpu_eth_init() fails because net/eth.c already prints it. In order to simplify the code, just return the value from cpu_eth_init(bis) directly. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
There is no need to print an error message when cpu_eth_init() fails because net/eth.c already prints it. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
There is no need to print an error message when cpu_eth_init() fails because net/eth.c already prints it. In order to simplify the code, just return the value from cpu_eth_init(bis) directly. Cc: Stefan Roese <sr@denx.de> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Stefan Roese <sr@denx.de>
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Fabio Estevam authored
There is no need to print an error message when cpu_eth_init() fails because net/eth.c already prints it. In order to simplify the code, just return the value from cpu_eth_init(bis) directly. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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