- Feb 24, 2015
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Masahiro Yamada authored
This is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by:
Sughosh Ganu <urwithsughosh@gmail.com> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Acked-by:
Marek Vasut <marex@denx.de>
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Masahiro Yamada authored
This is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chan-Taek Park <c-park@ti.com> Acked-by:
Marek Vasut <marex@denx.de>
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Masahiro Yamada authored
This is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Po-Yu Chuang <ratbert@faraday-tech.com> Acked-by:
Marek Vasut <marex@denx.de>
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Masahiro Yamada authored
These are still non-generic boards. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Greg Ungerer <greg.ungerer@opengear.com> Acked-by:
Marek Vasut <marex@denx.de>
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Masahiro Yamada authored
This is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Lei Wen <leiwen@marvell.com> Acked-by:
Marek Vasut <marex@denx.de>
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Masahiro Yamada authored
This is still a non-generic board. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Matthias Weisser <weisserm@arcor.de> Acked-by:
Marek Vasut <marex@denx.de>
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Masahiro Yamada authored
Now CONFIG_SPL_BUILD is not defined in Kconfig, so "!depends on SPL_BUILD" and "if !SPL_BUILD" are redundant. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
When Kconfig for U-boot was examined, one of the biggest issues was how to support multiple images (Normal, SPL, TPL). There were actually two options, "single .config" and "multiple .config". After some discussions and thought experiments, I chose the latter, i.e. to create ".config", "spl/.config", "tpl/.config" for Normal, SPL, TPL, respectively. It is true that the "multiple .config" strategy provided us the maximum flexibility and helped to avoid duplicating CONFIGs among Normal, SPL, TPL, but I have noticed some fatal problems: [1] It is impossible to share CONFIG options across the images. If you change the configuration of Main image, you often have to adjust some SPL configurations correspondingly. Currently, we cannot handle the dependencies between them. It means one of the biggest advantages of Kconfig is lost. [2] It is too painful to change both ".config" and "spl/.config". Sunxi guys started to work around this problem by creating a new configuration target. Commit cbdd9a97 (sunxi: kconfig: Add %_felconfig rule to enable FEL build of sunxi platforms.) added "make *_felconfig" to enable CONFIG_SPL_FEL on both images. Changing the configuration of multiple images in one command is a generic demand. The current implementation cannot propose any good solution about this. [3] Kconfig files are getting ugly and difficult to understand. Commit b724bd7d (dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to Kconfig) has sprinkled "if !SPL_BUILD" over the Kconfig files. [4] The build system got more complicated than it should be. To adjust Linux-originated Kconfig to U-Boot, the helper script "scripts/multiconfig.sh" was introduced. Writing a complicated text processor is a shell script sometimes caused problems. Now I believe the "single .config" will serve us better. With it, all the problems above would go away. Instead, we will have to add some CONFIG_SPL_* (and CONFIG_TPL_*) options such as CONFIG_SPL_DM, but we will not have much. Anyway, this is what we do now in scripts/Makefile.spl. I admit my mistake with my apology and this commit switches to the single .config configuration. It is not so difficult to do that: - Remove unnecessary processings from scripts/multiconfig.sh This file will remain for a while to support the current defconfig format. It will be removed after more cleanups are done. - Adjust some makefiles and Kconfigs - Add some entries to include/config_uncmd_spl.h and the new file scripts/Makefile.uncmd_spl. Some CONFIG options that are not supported on SPL must be disabled because one .config is shared between SPL and U-Boot proper going forward. I know this is not a beautiful solution and I think we can do better, but let's see how much we will have to describe them. - update doc/README.kconfig More cleaning up patches will follow this. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Masahiro Yamada authored
It is true that malloc is necessary for Driver Model before relocation, but there is no good reason to reserve the malloc space more than enough. The default value 0x400 works well. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Alison Wang authored
There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id for using the same SMMU3 on LS1021A. Signed-off-by:
Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by:
Alison Wang <alison.wang@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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chenhui zhao authored
The RCPM FSM may not be reset after power-on, for example, in the cases of cold boot and wakeup from deep sleep. It causes cache coherency problem and may block deep sleep. Therefore, reset them if they are not be reset. Signed-off-by:
Chenhui Zhao <chenhui.zhao@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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Minghuan Lian authored
Signed-off-by:
Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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Minghuan Lian authored
LS1021A's PCIe1 region begins 0x40_00000000; PCIe2 begins 0x48_00000000. In order to access PCIe device, we must create TLB to map the 40bit physical address to 32bit virtual address. This patch will enable MMU after DDR is available and creates MMU table in DRAM to map all 4G space; then, re-use the reserved space to map PCIe region. The following the mapping layout. VA mapping: ------- <---- 0GB | | | | |-------| <---- 0x24000000 |///////| ===> 192MB VA map for PCIe1 with offset 0x40_0000_0000 |-------| <---- 0x300000000 | | |-------| <---- 0x34000000 |///////| ===> 192MB VA map for PCIe2 with offset 0x48_0000_0000 |-------| <---- 0x40000000 | | |-------| <---- 0x80000000 DDR0 space start |\\\\\\\| |\\\\\\\| ===> 2GB VA map for 2GB DDR0 Memory space |\\\\\\\| ------- <---- 4GB DDR0 space end Signed-off-by:
Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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Alison Wang authored
This patch is to define default values for some CCSR macros to make header files cleaner. Signed-off-by:
Alison Wang <alison.wang@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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J. German Rivera authored
Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree from "fsl,dprcr" to "fsl-mc". Print MC version info when appropriate. Signed-off-by:
J. German Rivera <German.Rivera@freescale.com> Signed-off-by:
Lijun Pan <Lijun.Pan@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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York Sun authored
Erratum A008514 appleis to ls2085a. Signed-off-by:
York Sun <yorksun@freescale.com>
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York Sun authored
Erratum A008336 applied to LS2085A. Signed-off-by:
York Sun <yorksun@freescale.com>
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York Sun authored
FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for general DDR controlers, and another clock for DP-DDR. DDR driver needs to change to support multiple clocks. Signed-off-by:
York Sun <yorksun@freescale.com>
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York Sun authored
Erratum A008336 requires setting EDDRTQCR1[2] in DDRC DCSR space for 64-bit DDR controllers. Signed-off-by:
York Sun <yorksun@freescale.com>
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Bhupesh Sharma authored
This patch adds the fdt-fixup logic for the clock frequency of the NS16550A related device tree nodes. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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York Sun authored
Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using assembly function to guarantee stack is not used before flushing is completed. Timeout is needed for simualtor on which CCN-504 is not implemented. Return value can be checked for timeout situation. Change bootm.c to disable dcache instead of simply flushing, required by flushing L3. Signed-off-by:
York Sun <yorksun@freescale.com>
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Arnab Basu authored
U-Boot should only add "enable-method" and "cpu-release-address" properties to the "cpu" node of the online cores. Signed-off-by:
Arnab Basu <arnab.basu@freescale.com> Signed-off-by:
York Sun <yorksun@freescale.com>
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York Sun authored
According to hardware implementation, a single outer shareable global coherence group is defined. Inner shareable has not bee enabled. Signed-off-by:
York Sun <yorksun@freescale.com>
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Bhupesh Sharma authored
This patch ensures that the TZPC (BP147) and TZASC-400 programming happens for LS2085A SoC only when the desired config flags are enabled and ensures that the TZPC programming is done to allow Non-secure (NS) + secure (S) transactions only for DCGF registers. The TZASC component is not present on LS2085A-Rev1, so the TZASC-400 config flag is turned OFF for now. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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- Feb 21, 2015
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Hans de Goede authored
Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, halving the mbus frequency, so set it to 300 MHz ourselves and base the mbus divider on that. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Ian Campbell <ijc@hellion.org.uk>
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Stephen Warren authored
USB doesn't seem to work yet; the controller detects the on-board Hub/ Ethernet device but can't read the descriptors from it. I haven't investigated yet. Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org>
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Stephen Warren authored
The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org>
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Stephen Warren authored
Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org>
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Masahiro Yamada authored
This commit adds $(srctree)/arch/arm/$(machdirs)/include/mach to the headers search path. It allows us to replace "#include <asm/arch/foo.h>" with "#include <mach/foo.h>". As "#include <asm/arch/foo.h>" is still supported, we can modify each file one by one. Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Move arch/arm/include/asm/arch-keystone/* -> arch/arm/mach-keystone/include/mach/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
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Masahiro Yamada authored
Move arch/arm/include/asm/arch-orion5x/* -> arch/arm/mach-orion5x/include/mach/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Masahiro Yamada authored
Move arch/arm/include/asm/arch-nomadik/* -> arch/arm/mach-nomadik/include/mach/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com> Cc: Alessandro Rubini <rubini@unipv.it>
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Masahiro Yamada authored
Move arch/arm/include/asm/arch-kirkwood/* -> arch/arm/mach-kirkwood/include/mach/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by:
Stefan Roese <sr@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
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Masahiro Yamada authored
Move arch/arm/include/asm/arch-davinci/* -> arch/arm/mach-davinci/include/mach/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
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Masahiro Yamada authored
Move arch/arm/include/asm/arch-at91/* -> arch/arm/mach-at91/include/mach/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Masahiro Yamada authored
Move arch/arm/cpu/armv7/keystone/* -> arch/arm/mach-keystone/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
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Masahiro Yamada authored
Move arch/arm/cpu/arm926ejs/versatile/* -> arch/arm/mach-versatile/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com>
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Masahiro Yamada authored
Move arch/arm/cpu/arm926ejs/orion5x/* -> arch/arm/mach-orion5x/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Masahiro Yamada authored
Move arch/arm/cpu/armv7/highbank/* -> arch/arm/mach-highbank/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Rob Herring <robh@kernel.org>
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Masahiro Yamada authored
Move arch/arm/cpu/arm926ejs/nomadik/* -> arch/arm/mach-nomadik/* Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com> Cc: Alessandro Rubini <rubini@unipv.it>
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