- Aug 11, 2017
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Simon Glass authored
This converts the following to Kconfig: CONFIG_CMD_SPL Note that trats does not actually use SPL, so this option can no-longer be set. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Simon Glass authored
This converts the following to Kconfig: CONFIG_CMD_SAVES Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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Simon Glass authored
This converts the following to Kconfig: CONFIG_CMD_PCI Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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- Aug 10, 2017
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Adam Ford authored
This converts the following to Kconfig: CONFIG_SYS_I2C_OMAP24XX Signed-off-by:
Adam Ford <aford173@gmail.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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- Aug 09, 2017
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Rajesh Bhagat authored
Signed-off-by:
Rajat Srivastava <rajat.srivastava@nxp.com> Signed-off-by:
Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by:
yinbo.zhu <yinbo.zhu@nxp.com> [YS: Revise subject, remove commit message] Reviewed-by:
York Sun <york.sun@nxp.com>
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Hou Zhiqiang authored
It is derived from Platform clock instead of Platform PLL frequency. Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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Adam Ford authored
The driver is for all boards 24XX and up, so let's eliminate the extra option called CONFIG_SYS_I2C_OMAP34XX since the driver checks for CONFIG_OMAP34XX we don't need CONFIG_SYS_I2C_OMAP34XX. Signed-off-by:
Adam Ford <aford173@gmail.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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- Aug 08, 2017
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Tom Rini authored
Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com> Signed-off-by:
Tom Rini <trini@konsulko.com>
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- Aug 07, 2017
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Alexandru Gagniuc authored
Signed-off-by:
Alexandru Gagniuc <alex.g@adaptrum.com> Acked-by:
Joe Hershberger <joe.hershberger@ni.com>
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Suji Velupillai authored
move to Kconfig: CONFIG_BCM_SF2_ETH CONFIG_BCM_SF2_ETH_DEFAULT_PORT CONFIG_BCM_SF2_ETH_GMAC Also modified defconfigs of all platforms that use these configs. Signed-off-by:
Suji Velupillai <suji.velupillai@broadcom.com> Tested-by:
Suji Velupillai <suji.velupillai@broadcom.com> Reviewed-by:
JD Zheng <jiandong.zheng@broadcom.com> Reviewed-by:
Scott Branden <scott.branden@broadcom.com> Signed-off-by:
Steve Rae <steve.rae@raedomain.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Acked-by:
Joe Hershberger <joe.hershberger@ni.com>
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- Aug 05, 2017
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Patrice Chotard authored
fix the following compilation error reported by buidlman: arm: + stm32f429-discovery +arch/arm/mach-stm32/stm32f4/soc.c: In function 'arch_cpu_init': +arch/arm/mach-stm32/stm32f4/soc.c:30:2: error: 'for' loop initial declarations are only allowed in C99 or C11 mode + for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++) + ^ +arch/arm/mach-stm32/stm32f4/soc.c:30:2: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code +make[3]: *** [arch/arm/mach-stm32/stm32f4/soc.o] Error 1 +make[2]: *** [arch/arm/mach-stm32/stm32f4] Error 2 +make[1]: *** [arch/arm/mach-stm32] Error 2 +make: *** [sub-make] Error 2 Signed-off-by:
Patrice Chotard <patrice.chotard@st.com> Acked-by:
Vikas Manocha <vikas.manocha@st.com>
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Wenyou.Yang@microchip.com authored
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by:
Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou.Yang@microchip.com authored
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by:
Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou.Yang@microchip.com authored
Update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by:
Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou.Yang@microchip.com authored
To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by:
Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou.Yang@microchip.com authored
To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by:
Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou.Yang@microchip.com authored
To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by:
Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Wenyou.Yang@microchip.com authored
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by:
Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Aug 02, 2017
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Marek Vasut authored
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6, commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3 and H3 ULCB and Salvator-X boards. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Marek Vasut authored
Add initial support for the R8A7795 and R8A7796 based ULCB board. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Marek Vasut authored
Add the PFC5 PUEN address and SSI SDATA4 bit offset into the rcar-gen3-base.h . Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Siva Durga Prasad Paladugu authored
Modify chip_id() routine such that to handle based on the current el. Also make it available even if FPGA is not enabled in system such it can be used always. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Siva Durga Prasad Paladugu authored
This patch makes chip_id() as a global routine so that it can be used in other places as required. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Siva Durga Prasad Paladugu authored
This patch modifies the chip_id routine to get either idcode or silicon version based on the argument received. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Not using board revision is causing confusion about which board is supported and tested. Mark dts files exactly with board revision which was tested. When new board revision arives it can be symlink if SW view is the same. Also add -revX suffix to compatible string because user space tools are parsing this string and can change behavior depends of board revision. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Siva Durga Prasad Paladugu authored
Remove incorrect code of writing to system timestamp counter registers. This register writes does nothing and can be removed. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
There is a need to include psu_init also in mini u-boot configuration that's why handle psu_init via Kconfig property. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
For some mini platforms there could be a need to include psu_init. That's why move it to board file instead of spl only file. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Siva Durga Prasad Paladugu authored
This patch removes ifdef around mmio read and write rotuines and make them a single routine by checking the current el. This patch helps to remove ifdef around invoke_smc as well. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Siva Durga Prasad Paladugu authored
TCM on ZynqMP needs to be intialized in a sequence and this patch provides a global routine to perform this as per requirement. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Siva Durga Prasad Paladugu authored
This patch provides an option to include OCM and TCM memory into MMU table with corresponding memory attributes. Signed-off-by:
Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Alexander Graf authored
The Z-Turn board is a low cost development board based on the Xilinx Zynq SoC. While it's powerful and quite versatile, it so far lacked upstream support. This patch adds basic support for the Z-Turn. It does however for now miss enablement for MIO51 reset which means that USB and ethernet don't work. For that either FSBL or SPL need to be adjusted. The SPL part will follow later. Signed-off-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Alexander Graf authored
When using EFI_LOADER, we add a few special sections for runtime code and data which get relocated on demand when executing a target OS. These runtime structures need to get annotated properly in the linker script. While we do that properly in the generic one, we missed out on the zynq specific linker script. This patch adds the EFI runtime section annotations into the zynq linker script so that the efi loader code actually works on that platform. Signed-off-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
This will simplify dt overlay structure for the whole PL. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Moritz Fischer <moritz.fischer@ettus.com>
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- Aug 01, 2017
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Santan Kumar authored
Update SVR as per the SOC document. -LS2081A: 0x870919 -> 0x870918 -LS2041A: 0x870915 -> 0x870914 Signed-off-by:
Santan Kumar <santan.kumar@nxp.com> Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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Alison Wang authored
The duplicate definitions for IH_ARCH_ARM and IH_ARCH_ARM64 are removed. The definitions in <image.h> are used. According to this modification, the comparison between os arch and cpu arch is done in C programming instead of ASM programming. Signed-off-by:
Alison Wang <alison.wang@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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Simon Glass authored
This is shown as active high in the schematics[1], so fix it. [1] https://patchwork.ozlabs.org/patch/777890/ Signed-off-by:
Simon Glass <sjg@chromium.org> Reported-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jul 31, 2017
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Andrew F. Davis authored
The image address passed to secure_boot_verify_image() may not be cacheline aligned, round the address down to the nearest cacheline. Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
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- Jul 28, 2017
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Bin Meng authored
Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS, remove it in all boards' config files. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Stefan Roese <sr@denx.de> Tested-by:
Stefan Roese <sr@denx.de>
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Simon Glass authored
Convert this PMIC driver to driver model and fix up other users. The regulator and GPIO functions are now handled by separate drivers. Update nyan-big to work correct. Three boards will need to be updated by the maintainers: apalis-tk1, cei-tk1-som. Also the TODO in the code re as3722_sd_set_voltage() needs to be completed. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Lukasz Majewski <lukma@denx.de> Tested-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Jetson-TK1 Tested-by:
Stephen Warren <swarren@nvidia.com>
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