- Jan 23, 2010
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Vipin KUMAR authored
SPEAr310 SoC support contains basic spear310 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver - emi driver(cfi support) Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface Paraller NOR flashes. This patch adds the support for this IP The standard CFI driver is used to interface with NOR flashes Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
SPEAr300 SoC support contains basic spear300 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
This patch adds the support to read and write mac id from i2c memory. For reading: if (env contains ethaddr) pick env ethaddr else pick ethaddr from i2c memory For writing: chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id in i2c memory Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
SPEAr600 SoC support contains basic spear600 support along with the usage of following drivers - serial driver(UART) - i2c driver - smi driver - nand driver(FSMC) - usbd driver Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
SPEAr SoCs contain a synopsys usb device controller. USB Device IP can work in 2 modes - DMA mode - Slave mode The driver adds support only for slave mode operation of usb device IP. This driver is used along with standard USBTTY driver to obtain a tty interface over USB on the host Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
SPEAr SoCs contain an FSMC controller which can be used to interface with a range of memories eg. NAND, SRAM, NOR. Currently, this driver supports interfacing FSMC with NAND memories Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
SPEAr SoCs contain a serial memory interface controller. This controller is used to interface with spi based memories. This patch adds the driver for this IP. Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
SPEAr SoCs contain a synopsys i2c controller. This patch adds the driver for this IP. Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
SPEAr Architecture support added. It contains the support for following SPEAr blocks - Timer - System controller - Misc registers Signed-off-by:
Vipin <vipin.kumar@st.com>
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Vipin KUMAR authored
README.spear contains information about SPEAr architecture and build options etc Signed-off-by:
Vipin <vipin.kumar@st.com>
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Tom Rix authored
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 2045124ffd1a5e46d157349016a2c50f19c8c91d Signed-off-by:
Tom Rix <Tom.Rix@windriver.com>
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Prafulla Wadaskar authored
As per coding guidlines, it is good to maintain proper ordering in the makefiles. This was missed during initial coding, corrected here. This was discovered during orion5x code review Thanks to Albert Aribaud for this. Signed-off-by:
Prafulla Wadaskar <prafulla@marvell.com>
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Prafulla Wadaskar authored
These are few files directly imported from Linux kernel source. Those are not modifyed at all ar per strategy. These files contains source with GPLv2 only whereas u-boot expects GPLv2 or latter These files are updated for the same from prior permission from original writes Acked-by:
Nicolas Pitre <nico@marvell.com> Signed-off-by:
Prafulla Wadaskar <prafulla@marvell.com>
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Minkyu Kang authored
Because of v7_flush_dcache_all is moved to omap3/cache.S and s5pc110 needs cache routines, update s5pc1xx cache routines. l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S and invalidate_dcache is modified for SoC specific. Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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Seunghyeon Rhee authored
The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control for S3C6400. In the configuration of SMDK6400, however, two 16-bit mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit memory bus and there is no need to control CKE for each chip separately. AFAIK, CKE1 is not at all connected. Only CKE0 is used. Futhermore, it should be '0' always for S3C6410. When tested with a board which has a S3C6410 and the same memory configuration, a side effect is observed that u-boot command "reset" doesn't work leading to system hang. Leaving the bit clear is safe in most cases. Signed-off-by:
Seunghyeon Rhee <seunghyeon@lpmtec.com> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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- Jan 21, 2010
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Detlev Zundel authored
This is not only a cosmetic change as it fixes the real bug of board reset not working with the ELDK 4.2 toolchain. Signed-off-by:
Detlev Zundel <dzu@denx.de>
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Mike Frysinger authored
It's useful to be able to build up the host tools without having to select a board first. Pretty much all tools in there are config-independent anyways. Also add a shortcut "tools-all" to quickly build all host tools that are actually config-independent to allow for simple test builds. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This code doesn't use any config.h defines, and the sha1.h header already declares a sha1_csum prototype. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The u-boot command structures don't get used with host systems, so don't bother including it when building host code. This avoids an implicit need on config.h in the process. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Matthias Weisser authored
Signed-off-by:
Matthias Weisser <weisserm@arcor.de>
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Wolfgang Denk authored
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Mike Frysinger authored
Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The sha1 code is currently compiled for everyone, but in reality, it's only used by the FIT code. So make it optional just like MD5. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Felix Radensky authored
On platforms where SPD EEPROM and another EEPROM have adjacent I2C addresses SPD_EEPROM_ADDRESS should be defined as a single element array, otherwise DDR2 setup code would fail with the following error: ERROR: Unknown DIMM detected in slot 1 However, fixing SPD_EEPROM_ADDRESS would result in another error: ERROR: DIMM's DDR1 and DDR2 type can not be mixed. This happens because initdram() routine does not explicitly initialize dimm_populated array. This patch fixes the problem. Signed-off-by:
Felix Radensky <felix@embedded-sol.com> Signed-off-by:
Stefan Roese <sr@denx.de>
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Felix Radensky authored
Bootstrap options G and F are reported incorrectly (G instead of F and vice versa). This patch fixes this. Signed-off-by:
Felix Radensky <felix@embedded-sol.com> Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jan 20, 2010
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Shinya Kuribayashi authored
with a few adjustments for U-Boot. This fixes the following build error: make -C lib_generic/ zlib.c:31:27: error: asm/unaligned.h: No such file or directory zlib.c: In function 'inflate_fast': zlib.c:641: warning: implicit declaration of function 'get_unaligned' make[1]: *** [zlib.o] Error 1 make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic' make: *** [lib_generic/libgeneric.a] Error 2 Reported-by:
Himanshu Chauhan <himanshu@symmetricore.com> Signed-off-by:
Shinya Kuribayashi <skuribay@pobox.com>
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- Jan 19, 2010
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Magnus Lilja authored
Signed-off-by:
Magnus Lilja <lilja.magnus@gmail.com>
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Magnus Lilja authored
Import the large page oob layout from Linux mxc_nand.c driver. The CONFIG_SYS_NAND_LARGEPAGE option is used to activate the large page oob layout. Run time detection is not supported as this moment. This has been tested on the i.MX31 PDK board with a large page NAND device. Signed-off-by:
Magnus Lilja <lilja.magnus@gmail.com>
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Magnus Lilja authored
Tested on i.MX31 Litekit. Signed-off-by:
Magnus Lilja <lilja.magnus@gmail.com>
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Magnus Lilja authored
Signed-off-by:
Magnus Lilja <lilja.magnus@gmail.com>
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Michal Simek authored
Microblaze has own hw unaligned handler if is available. Use big endian version. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
Commit 6a45e384 should remove reference from Microblaze too. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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- Jan 18, 2010
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Alessandro Rubini authored
Signed-off-by:
Alessandro Rubini <rubini@unipv.it>
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Ben Warren authored
Commit 6a45e384 (Make getenv_IPaddr() global) inadvertently added ' #include "net.h" ' to the standalone programs, creating duplicate definitions of 'struct eth_device'. This patch removes the local definitions and removes other code that breaks due to the change in definition. Signed-off-by:
Ben Warren <biggerbadderben@gmail.com> Acked-by:
Mike Frysinger <vapier@gentoo.org>
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Daniel Hobi authored
During parallel build, the top Makefile spawns multiple sub-makes for targets in cpu/$(CPU) and $(dir $(LDSCRIPT)). If the .depend files are not present in these directories, the sub-makes may end up generating these files simultaneously which leads to corrupted content. A typical error message is: .depend:39: *** multiple target patterns. Stop. This patch serializes the creation of .depend in cpu/$(CPU) and $(dir $(LDSCRIPT)) by adding these directories to the depend target in the top Makefile. Other directories in $(LIBS) are not affected since they contain only one Make target and thus only one sub-make is spawned per directory. Signed-off-by:
Daniel Hobi <daniel.hobi@schmid-telecom.ch> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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