pinctrl: uniphier: set input-enable before pin-muxing

While IECTRL is disabled, input signals are pulled-down internally.
If pin-muxing is set up first, glitch signals (Low to High transition)
might be input to hardware blocks.

Bad case scenario:
[1] The hardware block is already running before pinctrl is handled.
   (the reset is de-asserted by default or by a firmware, for example)
[2] The pin-muxing is set up.  The input signals to hardware block
   are pulled-down by the chip-internal biasing.
[3] The pins are input-enabled.  The signals from the board reach the
    hardware block.

Actually, one invalid character is input to the UART blocks for such
SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the
power on reset.

To avoid such problems, pins should be input-enabled before muxing.

[ ported from Linux commit bac7f4c1bf5e7c6ccd5bb71edc015b26c77f7460 ]

Fixes: 5dc626f8 ("pinctrl: uniphier: add UniPhier pinctrl core support")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

@@ -74,6 +74,9 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
 	unsigned reg, reg_end, shift, mask;
 	u32 tmp;
 
+	/* some pins need input-enabling */
+	uniphier_pinconf_input_enable(dev, pin);
+
 	reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
 	reg_end = reg + reg_stride;
 	shift = pin * mux_bits % 32;
@@ -94,9 +97,6 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
 
 	if (priv->socdata->load_pinctrl)
 		writel(1, priv->base + UNIPHIER_PINCTRL_LOAD_PINMUX);
-
-	/* some pins need input-enabling */
-	uniphier_pinconf_input_enable(dev, pin);
 }
 
 static int uniphier_pinmux_group_set(struct udevice *dev,