mpc8308rdb: add support for Spansion SPI flash on header J8

The SPI pins are routed to header J8 for testing SPI functionality. A
Spansion flash has been wired up and tested on this header.

This patch breaks support for the second TSEC interface, since the GPIO
pin used as a chip select is pinmuxed with some of the TSEC pins.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>