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Commit e6d9c891 authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kim Phillips
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mpc83xx: add TSECs' HRCWH masks for MPC837x processors 


We'll use these masks to parse TSEC modes out of HRCWH.

Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
parent 6f9cc660
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include/mpc83xx.h
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...@@ -544,12 +544,14 @@ ...@@ -544,12 +544,14 @@
#define HRCWH_RL_EXT_LEGACY 0x00000000 #define HRCWH_RL_EXT_LEGACY 0x00000000
#define HRCWH_RL_EXT_NAND 0x00040000 #define HRCWH_RL_EXT_NAND 0x00040000
#define HRCWH_TSEC1M_MASK 0x0000E000
#define HRCWH_TSEC1M_IN_MII 0x00000000 #define HRCWH_TSEC1M_IN_MII 0x00000000
#define HRCWH_TSEC1M_IN_RMII 0x00002000 #define HRCWH_TSEC1M_IN_RMII 0x00002000
#define HRCWH_TSEC1M_IN_RGMII 0x00006000 #define HRCWH_TSEC1M_IN_RGMII 0x00006000
#define HRCWH_TSEC1M_IN_RTBI 0x0000A000 #define HRCWH_TSEC1M_IN_RTBI 0x0000A000
#define HRCWH_TSEC1M_IN_SGMII 0x0000C000 #define HRCWH_TSEC1M_IN_SGMII 0x0000C000
#define HRCWH_TSEC2M_MASK 0x00001C00
#define HRCWH_TSEC2M_IN_MII 0x00000000 #define HRCWH_TSEC2M_IN_MII 0x00000000
#define HRCWH_TSEC2M_IN_RMII 0x00000400 #define HRCWH_TSEC2M_IN_RMII 0x00000400
#define HRCWH_TSEC2M_IN_RGMII 0x00000C00 #define HRCWH_TSEC2M_IN_RGMII 0x00000C00
......
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