Skip to content
Snippets Groups Projects
Commit d7dd358f authored by Stefan Roese's avatar Stefan Roese
Browse files

arm64: mvebu: Init COMPHY from the slave-CP on the A8k


The Armada8k implements 2 CPs (communication processors) and the 2nd
CP also is equipped with a COMPHY controller. This patch now loops
over all enabled MISC devices (CP110) enabled in the DT to initialize
all CPs.

Signed-off-by: default avatarStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
parent af4c271c
No related branches found
No related tags found
No related merge requests found
......@@ -109,12 +109,20 @@ int arch_early_init_r(void)
{
struct udevice *dev;
int ret;
/* Call the comphy code via the MISC uclass driver */
ret = uclass_get_device(UCLASS_MISC, 0, &dev);
if (ret) {
debug("COMPHY init failed: %d\n", ret);
return -ENODEV;
int i;
/*
* Loop over all MISC uclass drivers to call the comphy code
* and init all CP110 devices enabled in the DT
*/
i = 0;
while (1) {
/* Call the comphy code via the MISC uclass driver */
ret = uclass_get_device(UCLASS_MISC, i++, &dev);
/* We're done, once no further CP110 device is found */
if (ret)
break;
}
/* Cause the SATA device to do its early init */
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment