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Commit d3100d63 authored by Troy Kisky's avatar Troy Kisky
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sp: initial addition, Boundary Devices board


sp.h: CONFIG_IPUV3_CLK 264000000
sp: setup_dispay is done in fbpanel
sp: add CONFIG_CMD_GPIO
sp: explicit fbp_detect_i2c
sp: verify port in board_ehci_hcd_init
sp: use boundary.h
sp: add CONFIG_SPI_FLASH_SPANSION
sp: sp_defconfig add CONFIG_BLOCK_CACHE
sp: use common code for eth init
sp: eth.c now in common directory
sp: move misc_init_r/do_kbd to common
sp: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common
sp: add  CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs
sp: add sp_s512m.cfg
sp: port to v2018.07

Signed-off-by: default avatarTroy Kisky <troy.kisky@boundarydevices.com>

sp: update to v2017.01
sp: update to v2017.03
sp.h: add custom BOOT_TARGET_DEVICES priority

Signed-off-by: default avatarGary Bisson <gary.bisson@boundarydevices.com>
parent 390c2e3e
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......@@ -497,6 +497,9 @@ config TARGET_SES
config TARGET_SNAP
bool "snap"
config TARGET_SP
bool "sp"
config TARGET_YS
bool "ys"
select MX6SX
......@@ -671,6 +674,7 @@ source "board/boundary/rc/Kconfig"
source "board/boundary/s/Kconfig"
source "board/boundary/ses/Kconfig"
source "board/boundary/snap/Kconfig"
source "board/boundary/sp/Kconfig"
source "board/boundary/ys/Kconfig"
source "board/bticino/mamoj/Kconfig"
source "board/ccv/xpress/Kconfig"
......
# Yocto-specifics
setenv bootpart 2
setenv bootdir /
setenv bootargs enable_wait_mode=off
setenv bootargs $bootargs ar1020_i2c.calibration=-17810,0,60214224,0,-22625,78839808,65536,768,1024
setenv nextcon 0;
if hdmidet ; then
setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24,bpp=32
setenv fbmem "fbmem=28M";
setexpr nextcon $nextcon + 1
else
echo "------ no HDMI monitor";
fi
setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LG-9.7,if=RGB666,bpp=32
if test "0" -eq $nextcon; then
setenv fbmem "fbmem=10M";
else
setenv fbmem ${fbmem},10M
fi
setexpr nextcon $nextcon + 1
while test "4" -ne $nextcon ; do
setenv bootargs $bootargs video=mxcfb${nextcon}:off ;
setexpr nextcon $nextcon + 1 ;
done
setenv bootargs $bootargs $fbmem
setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait"
if itest.s x$bootpart == x ; then
bootpart=1
fi
setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ;
dtbname="imx6";
if itest.s x6S != "x$cpu" ; then
dtbname=${dtbname}q-;
else
dtbname=${dtbname}s-;
fi
if itest.s x == "x$board" ; then
board=sabrelite
fi
dtbname=${dtbname}${board}.dtb;
if itest.s x == x${bootdir} ; then
bootdir=/boot/
fi
if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then
havedtb=1;
else
havedtb=
fi
if itest.s x == x$allow_noncea ; then
setenv bootargs $bootargs mxc_hdmi.only_cea=1;
echo "only CEA modes allowed on HDMI port";
else
setenv bootargs $bootargs mxc_hdmi.only_cea=0;
echo "non-CEA modes allowed on HDMI, audio may be affected";
fi
if kbd ; then
if itest.s xB == x$keybd ; then
if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage-usbwrite ; then
if ${fs}load ${dtype} ${disk}:1 12800000 ${bootdir}uramdisk-usbwrite.img ; then
if itest.s x$havedtb == x ; then
bootm 10800000 12800000 ;
else
bootm 10800000 12800000 12000000 ;
fi
fi
fi
fi
fi
if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then
if itest.s x$havedtb == x ; then
bootm 10800000 ;
else
bootm 10800000 - 12000000
fi
fi
echo "Error loading kernel image"
if TARGET_SP
config SYS_CPU
default "armv7"
config SYS_BOARD
default "sp"
config SYS_VENDOR
default "boundary"
config SYS_SOC
default "mx6"
config SYS_CONFIG_NAME
default "sp"
source "board/boundary/common/Kconfig"
endif
SP BOARD
M: Troy Kisky <troy.kisky@boundarydevices.com>
S: Maintained
F: board/boundary/sp/
F: include/configs/sp.h
F: configs/sp_defconfig
#
# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de>
# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
# Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := sp.o
/*
* Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
* Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/sys_proto.h>
#include <malloc.h>
#include <asm/arch/mx6-pins.h>
#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/fbpanel.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/mach-imx/spi.h>
#include <mmc.h>
#include <fsl_esdhc.h>
#include <linux/fb.h>
#include <ipu_pixfmt.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/mxc_hdmi.h>
#include <i2c.h>
#include <input.h>
#include <usb/ehci-ci.h>
#include "../common/bd_common.h"
#include "../common/padctrl.h"
DECLARE_GLOBAL_DATA_PTR;
#define SPI_PAD_CTRL (PAD_CTL_HYS | \
PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
PAD_CTL_ODE | PAD_CTL_SRE_FAST)
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
/*
*
*/
static iomux_v3_cfg_t const init_pads[] = {
/* bt_rfkill */
#define GP_BT_RFKILL_RESET IMX_GPIO_NR(6, 16)
IOMUX_PAD_CTRL(NANDF_CS3__GPIO6_IO16, WEAK_PULLDN),
/* ECSPI1 */
IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL),
IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL),
IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL),
#define GP_ECSPI1_NOR_CS IMX_GPIO_NR(3, 19)
IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, SPI_PAD_CTRL),
/* gpio_Keys */
#define GP_GPIOKEY_BACK IMX_GPIO_NR(7, 13)
IOMUX_PAD_CTRL(GPIO_18__GPIO7_IO13, WEAK_PULLUP),
#define GP_GPIOKEY_HOME IMX_GPIO_NR(4, 5)
IOMUX_PAD_CTRL(GPIO_19__GPIO4_IO05, WEAK_PULLUP),
/* gpios */
#define GP_MAIN_POWER IMX_GPIO_NR(3, 29)
IOMUX_PAD_CTRL(EIM_D29__GPIO3_IO29, WEAK_PULLUP),
#define GP_L1 IMX_GPIO_NR(1, 7)
IOMUX_PAD_CTRL(GPIO_7__GPIO1_IO07, PAD_CTL_DSE_240ohm),
#define GP_L2 IMX_GPIO_NR(1, 8)
IOMUX_PAD_CTRL(GPIO_8__GPIO1_IO08, PAD_CTL_DSE_240ohm),
/* i2c1mux */
#define GP_I2C1MUXA_EN IMX_GPIO_NR(3, 20)
IOMUX_PAD_CTRL(EIM_D20__GPIO3_IO20, WEAK_PULLUP), /* CAM */
#define GP_I2C1MUXB_EN IMX_GPIO_NR(2, 23)
IOMUX_PAD_CTRL(EIM_CS0__GPIO2_IO23, WEAK_PULLUP), /* RTC */
#define GP_WIFI_WL_ENABLE IMX_GPIO_NR(6, 7)
IOMUX_PAD_CTRL(NANDF_CLE__GPIO6_IO07, OUTPUT_40OHM),
/* PWM1 - Backlight on RGB connector: J15 */
#define GP_BACKLIGHT_RGB IMX_GPIO_NR(1, 21)
IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, WEAK_PULLDN),
/* PWM4 - Backlight on LVDS connector: J6 */
#define GP_BACKLIGHT_LVDS_PWM IMX_GPIO_NR(1, 18)
IOMUX_PAD_CTRL(SD1_CMD__GPIO1_IO18, WEAK_PULLDN),
/* Backlight on LVDS connector: J6 */
#define GP_BACKLIGHT_LVDS_EN IMX_GPIO_NR(1, 17)
IOMUX_PAD_CTRL(SD1_DAT1__GPIO1_IO17, WEAK_PULLDN),
/* reg_wlan_en */
#define GP_REG_WLAN_EN IMX_GPIO_NR(6, 15)
IOMUX_PAD_CTRL(NANDF_CS2__GPIO6_IO15, WEAK_PULLDN),
/* UART1 */
IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL),
/* UART2 */
IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL),
IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL),
/* USBH1 */
#define GP_USB_HUB_RESET IMX_GPIO_NR(7, 12)
IOMUX_PAD_CTRL(GPIO_17__GPIO7_IO12, WEAK_PULLUP),
/* USBOTG */
IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP), /* USBOTG ID pin */
/* USDHC2 - TiWi wl1271 pads */
IOMUX_PAD_CTRL(SD2_CLK__SD2_CLK, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD2_CMD__SD2_CMD, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL),
/* USDHC3 - sdcard */
IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL),
#define GP_USDHC3_CD IMX_GPIO_NR(7, 0)
IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, WEAK_PULLUP),
/* USDHC4 - emmc */
IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL),
#define GP_EMMC_RESET IMX_GPIO_NR(2, 6)
IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLUP),
/* Wl1271 */
#define GPIRQ_WL1271_WL IMX_GPIO_NR(6, 14)
IOMUX_PAD_CTRL(NANDF_CS1__GPIO6_IO14, WEAK_PULLDN),
};
static const struct i2c_pads_info i2c_pads[] = {
/* I2C1: ADS1000, AR1020-I/SO*/
I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL),
/* I2C2 */
I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL),
/* I2C3, J8 - external touch, ISL1208 */
I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL),
};
#define I2C_BUS_CNT 3
#ifdef CONFIG_USB_EHCI_MX6
int board_ehci_hcd_init(int port)
{
if (port) {
/* Reset USB hub */
gpio_direction_output(GP_USB_HUB_RESET, 0);
mdelay(2);
gpio_set_value(GP_USB_HUB_RESET, 1);
}
return 0;
}
#endif
#ifdef CONFIG_FSL_ESDHC
struct fsl_esdhc_cfg board_usdhc_cfg[] = {
{.esdhc_base = USDHC3_BASE_ADDR, .bus_width = 4,
.gp_cd = GP_USDHC3_CD},
{.esdhc_base = USDHC4_BASE_ADDR, .bus_width = 8,
.gp_reset = GP_EMMC_RESET},
};
#endif
#ifdef CONFIG_MXC_SPI
int board_spi_cs_gpio(unsigned bus, unsigned cs)
{
return (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1;
}
#endif
#if defined(CONFIG_VIDEO_IPUV3)
void board_enable_lvds(const struct display_info_t *di, int enable)
{
gpio_direction_output(GP_BACKLIGHT_LVDS_PWM, enable);
gpio_direction_output(GP_BACKLIGHT_LVDS_EN, enable);
}
static const struct display_info_t displays[] = {
/* egalax_ts */
VD_LG9_7(LVDS, fbp_detect_i2c, 2, 0x04),
};
#define display_cnt ARRAY_SIZE(displays)
#else
#define displays NULL
#define display_cnt 0
#endif
static const unsigned short gpios_out_low[] = {
/* Disable wifi/bt */
GP_EMMC_RESET, /* hold in reset */
GP_WIFI_WL_ENABLE,
GP_BT_RFKILL_RESET,
GP_REG_WLAN_EN,
GP_I2C1MUXA_EN,
GP_L1,
GP_L2,
};
static const unsigned short gpios_out_high[] = {
GP_ECSPI1_NOR_CS, /* SS1 of spi nor */
GP_I2C1MUXB_EN, /* enable RTC */
GP_MAIN_POWER,
};
static const unsigned short gpios_in[] = {
GPIRQ_WL1271_WL,
GP_BACKLIGHT_LVDS_PWM,
GP_BACKLIGHT_LVDS_EN,
GP_GPIOKEY_BACK,
GP_GPIOKEY_HOME,
GP_USDHC3_CD,
};
int board_early_init_f(void)
{
set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in));
set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1);
set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0);
SETUP_IOMUX_PADS(init_pads);
return 0;
}
int board_init(void)
{
common_board_init(i2c_pads, I2C_BUS_CNT, IOMUXC_GPR1_OTG_ID_GPIO1,
displays, display_cnt, 0);
return 0;
}
const struct button_key board_buttons[] = {
{"back", GP_GPIOKEY_BACK, 'B', 1},
{"home", GP_GPIOKEY_HOME, 'H', 1},
{NULL, 0, 0, 0},
};
#ifdef CONFIG_CMD_BMODE
const struct boot_mode board_boot_modes[] = {
/* 4 bit bus width */
{"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
{"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
{NULL, 0},
};
#endif
void board_poweroff(void)
{
/* Turn off main power */
gpio_direction_output(GP_MAIN_POWER, 0);
while (1) {
udelay(1000000);
}
}
static int _do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
board_poweroff();
return 0;
}
U_BOOT_CMD(poweroff, 1, 1, _do_poweroff, "Turn off power", "");
/*
* Copyright (C) 2013 Boundary Devices
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
#include "asm/arch/mx6-ddr.h"
#include "asm/arch/iomux.h"
#include "asm/arch/crm_regs.h"
/* NC YET */
#define MX6_MMDC_P0_MPDGCTRL0_VAL 0x42350231
#define MX6_MMDC_P0_MPDGCTRL1_VAL 0x021A0218
#define MX6_MMDC_P0_MPRDDLCTL_VAL 0x4B4B4E49
#define MX6_MMDC_P0_MPWRDLCTL_VAL 0x3F3F3035
#define MX6_MMDC_P0_MPWLDECTRL0_VAL 0x0040003C
#define MX6_MMDC_P0_MPWLDECTRL1_VAL 0x0032003E
#define WALAT 1
#include "../common/mx6/ddr-setup.cfg"
#define RANK 0
#define BUS_WIDTH 32
/* H5TC2G63FFR-PBA */
/* MT41K128M16JT-125 IT:K */
#include "../common/mx6/800mhz_128mx16.cfg"
#include "../common/mx6/clocks.cfg"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_SP=y
CONFIG_FEC_MAC_FUSE=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/sp/sp_s512m.cfg,MX6S,DDR_MB=512,DEFCONFIG=\"sp\""
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_FASTBOOT_BUF_SIZE=0x26000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_NETDEVICES=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Boundary"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_ETHER=y
CONFIG_USB_ETH_CDC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_OF_LIBFDT=y
/*
* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
*
* Configuration settings for the Boundary Devices SP board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include "mx6_common.h"
#define CONFIG_MACH_TYPE 3771
#define CONFIG_ETHPRIME "usbnet"
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define BOOT_TARGET_DEVICES(func) DISTRO_BOOT_DEV_MMC(func)
#define BD_I2C_MASK 7
#include "boundary.h"
#define CONFIG_EXTRA_ENV_SETTINGS BD_BOUNDARY_ENV_SETTINGS \
#endif /* __CONFIG_H */
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