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Commit d0acd993 authored by Peng Fan's avatar Peng Fan Committed by Stefano Babic
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imx: add cpu type for i.MX6QP/DP


Add cpu type for i.MX6QP/DP.

This patch also fix is_mx6dqp(), since get_cpu_rev can return MXC_CPU_MX6QP
and MXC_CPU_MX6DP, we should use:
(is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)).

Signed-off-by: default avatarPeng Fan <Peng.Fan@freescale.com>
Acked-by: default avatarStefano Babic <sbabic@denx.de>
parent 5b94ce2c
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...@@ -62,12 +62,12 @@ u32 get_cpu_rev(void) ...@@ -62,12 +62,12 @@ u32 get_cpu_rev(void)
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
u32 reg = readl(&anatop->digprog_sololite); u32 reg = readl(&anatop->digprog_sololite);
u32 type = ((reg >> 16) & 0xff); u32 type = ((reg >> 16) & 0xff);
u32 major; u32 major, cfg = 0;
if (type != MXC_CPU_MX6SL) { if (type != MXC_CPU_MX6SL) {
reg = readl(&anatop->digprog); reg = readl(&anatop->digprog);
struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR; struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
u32 cfg = readl(&scu->config) & 3; cfg = readl(&scu->config) & 3;
type = ((reg >> 16) & 0xff); type = ((reg >> 16) & 0xff);
if (type == MXC_CPU_MX6DL) { if (type == MXC_CPU_MX6DL) {
if (!cfg) if (!cfg)
...@@ -81,6 +81,13 @@ u32 get_cpu_rev(void) ...@@ -81,6 +81,13 @@ u32 get_cpu_rev(void)
} }
major = ((reg >> 8) & 0xff); major = ((reg >> 8) & 0xff);
if ((major >= 1) &&
((type == MXC_CPU_MX6Q) || (type == MXC_CPU_MX6D))) {
major--;
type = MXC_CPU_MX6QP;
if (cfg == 1)
type = MXC_CPU_MX6DP;
}
reg &= 0xff; /* mx6 silicon revision */ reg &= 0xff; /* mx6 silicon revision */
return (type << 12) | (reg + (0x10 * (major + 1))); return (type << 12) | (reg + (0x10 * (major + 1)));
} }
......
...@@ -122,6 +122,10 @@ unsigned imx_ddr_size(void) ...@@ -122,6 +122,10 @@ unsigned imx_ddr_size(void)
const char *get_imx_type(u32 imxtype) const char *get_imx_type(u32 imxtype)
{ {
switch (imxtype) { switch (imxtype) {
case MXC_CPU_MX6QP:
return "6QP"; /* Quad-Plus version of the mx6 */
case MXC_CPU_MX6DP:
return "6DP"; /* Dual-Plus version of the mx6 */
case MXC_CPU_MX6Q: case MXC_CPU_MX6Q:
return "6Q"; /* Quad-core version of the mx6 */ return "6Q"; /* Quad-core version of the mx6 */
case MXC_CPU_MX6D: case MXC_CPU_MX6D:
......
...@@ -12,6 +12,8 @@ ...@@ -12,6 +12,8 @@
#define MXC_CPU_MX6Q 0x63 #define MXC_CPU_MX6Q 0x63
#define MXC_CPU_MX6D 0x64 #define MXC_CPU_MX6D 0x64
#define MXC_CPU_MX6SOLO 0x65 /* dummy ID */ #define MXC_CPU_MX6SOLO 0x65 /* dummy ID */
#define MXC_CPU_MX6DP 0x68
#define MXC_CPU_MX6QP 0x69
#define CS0_128 0 #define CS0_128 0
#define CS0_64M_CS1_64M 1 #define CS0_64M_CS1_64M 1
......
...@@ -30,9 +30,7 @@ const char *get_imx_type(u32 imxtype); ...@@ -30,9 +30,7 @@ const char *get_imx_type(u32 imxtype);
unsigned imx_ddr_size(void); unsigned imx_ddr_size(void);
void set_chipselect_size(int const); void set_chipselect_size(int const);
#define is_mx6dqp() ((is_cpu_type(MXC_CPU_MX6Q) || \ #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
is_cpu_type(MXC_CPU_MX6D)) && \
(soc_rev() >= CHIP_REV_2_0))
/* /*
* Initializes on-chip ethernet controllers. * Initializes on-chip ethernet controllers.
......
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