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Commit bc4d5c01 authored by Troy Kisky's avatar Troy Kisky
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nitrogen6_max: initial addition, Boundary Devices board


nitrogen6qp_max_defconfig: add imx6qp specific ddr calibration
nitrogen6qp_max4g.cfg: add Noc DDR configuration register set
nitrogen6qp_max4g.cfg: change IPU priorities for imx6qp
nitrogen6_max: prefer hannstar7 over lg1280x800
nitrogen6_max: add IMX_VD38_AUO_B101EW05
nitrogen6_max: add IMX_VD38_DT070BTFT
nitrogen6_max: add IMX_VD_LD070WSVGA
nitrogen6_max: add IMX_VD38_TM070JDHG30
nitrogen6_max: add IMX_VD_1080P60_J (jeida 1080p dual lvds)
nitrogen6_max.h: CONFIG_IPUV3_CLK 264000000
nitrogen6_max: use GP_KSZ9021_xx for KSZ9021 strapping
Ready for changing to atheros phy.
nitrogen6_max: use nitrogen6x clocks.cfg/ddr-setup.cfg
nitrogen6qp_max4g.cfg: Noc DDR config done in ddr-setup now
nitrogen6_max4g.cfg: add support for iMX6QP
nitrogen6qp_max4g.cfg: use nitrogen6_max4g.cfg instead
nitrogen6_max: add CONFIG_CMD_GPIO
nitrogen6_max: fix GP_BACKLIGHT_LVDS2
nitrogen6_max.h: make more like nitrogen6x.h
nitrogen6_max: explicit fbp_detect_i2c
nitrogen6_max: add wlmac
nitrogen6_max: verify port in board_ehci_hcd_init
nitrogen6_max: use boundary.h
nitrogen6_max: add nitrogen6_max_4gr0_defconfig for 4G rank0
nitrogen6_max: setup rgb_gpio_pads in board_early_init_f
nitrogen6_max: update comments in 1066mhz_4x512mx16.cfg
nitrogen6_max: add nitrogen6_max_dl2g_defconfig
nitrogen6_max: add nitrogen6_max_dl4g_defconfig
nitrogen6_max: add CONFIG_SPI_FLASH_SPANSION
nitrogen6_max: add VD_TFC_A9700LTWV35TC_C1
nitrogen6_max: add gt911 touch controller if serializer detected
nitrogen6_max: add VD_TFC_A9700LTWV35TC_C1 for LVDS2 as well
nitrogen6_max: add retries for i2c write failures
nitrogen6_max: add ND-070PCAP-1024x600
nitrogen6_max: nitrogen6_max_defconfig add CONFIG_BLOCK_CACHE
nitrogen6_max: use common code for eth init
nitrogen6_max: eth.c now in common directory
nitrogen6_max: move misc_init_r/do_kbd to common
nitrogen6_max: move mmc_init/ dram_init/ overwrite_console/ common_board_init/ splash_screen_prepare/ board_cfb_skip to common
nitrogen6_max: add headphone det, drive mute low
nitrogen6_max: add  CONFIG_SPI_FLASH_GIGADEVICE: to defconfigs
nitrogen6_max: fix DEFCONFIG nitrogen6_max_4gr0
nitrogen6_max: 800mhz_4x256mx16.cfg: use common values

MDCFG0: from 0x686c5343 to 0x666a5333
tRFC - from 105 to 103 clocks
tXS - from 109 to 107 clocks
tFAW - from 21 to 20 clocks

MDCFG1: from 0xb68f8d63 to 0xb68e8b63
tRAS - from 16 to 15 clocks
tWR - from 7 clocks to 6 clocks

MDCFG2: from 0x01ff00dc to 0x01ff00db
tRRD from 5 to 4 clocks

MDRWD: from 0x000026d2 to 0x0f9f26d2
restore unused field to default value

MDOR: from 0x006c1023 to 0x006a1023
tXPR - from 109 to 107 clocks

MR0: from 0x17208030 to 0x15208030
tWR - from 7 to 6 clocks

nitrogen6_max: 800mhz_4x512mx16.cfg: use common values

MDCFG0: from 0x686c5343 to 0x666a5343
tRFC - from 105 to 103 clocks
tXS - from 109 to 107 clocks

MDCFG1: from 0xb68f8d63 to 0xb68e8b63
tRAS - from 16 to 15 clocks
tWR - from 7 clocks to 6 clocks

MDRWD: from 0x000026d2 to 0x0f9f26d2
restore unused field to default value

MDOR: from 0x006c1023 to 0x006a1023
tXPR - from 109 to 107 clocks

MR0: from 0x17208030 to 0x15208030
tWR - from 7 to 6 clocks

nitrogen6_max: use common ddr scripts
nitrogen6_max: port to v2018.07

Signed-off-by: default avatarTroy Kisky <troy.kisky@boundarydevices.com>

nitrogen6qp_max: add preliminary support
nitrogen6_max.h: add basic fastboot support
Only works on eMMC with GPT already present.
nitrogen6_max: add secure boot option
nitrogen6_max: declare TC358743 interrupt as input
nitrogen6_max: update to v2017.01
nitrogen6_max: update to v2017.03

Signed-off-by: default avatarGary Bisson <gary.bisson@boundarydevices.com>
parent 1588c354
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......@@ -449,6 +449,9 @@ config TARGET_NEOL
config TARGET_NIT6XLITE
bool "nit6xlite"
config TARGET_NITROGEN6_MAX
bool "nitrogen6_max"
config TARGET_NITROGEN6X
bool "nitrogen6x"
imply USB_HOST_ETHER
......@@ -621,6 +624,7 @@ source "board/boundary/mtp/Kconfig"
source "board/boundary/mx6_r/Kconfig"
source "board/boundary/neol/Kconfig"
source "board/boundary/nit6xlite/Kconfig"
source "board/boundary/nitrogen6_max/Kconfig"
source "board/boundary/nitrogen6x/Kconfig"
source "board/boundary/ys/Kconfig"
source "board/bticino/mamoj/Kconfig"
......
if TARGET_NITROGEN6_MAX
config SYS_CPU
default "armv7"
config SYS_BOARD
default "nitrogen6_max"
config SYS_VENDOR
default "boundary"
config SYS_SOC
default "mx6"
config SYS_CONFIG_NAME
default "nitrogen6_max"
config ENV_WLMAC
bool
default y
source "board/boundary/common/Kconfig"
endif
NITROGEN6_MAX BOARD
M: Troy Kisky <troy.kisky@boundarydevices.com>
S: Maintained
F: board/boundary/nitrogen6_max/
F: include/configs/nitrogen6_max.h
F: configs/nitrogen6_max_defconfig
#
# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de>
# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
# Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := nitrogen6_max.o
obj-$(CONFIG_SPL_BUILD) += spl.o
This diff is collapsed.
/*
* Copyright (C) 2013 Boundary Devices
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
#include "asm/arch/mx6-ddr.h"
#include "asm/arch/iomux.h"
#include "asm/arch/crm_regs.h"
#ifdef CONFIG_MX6QP
/* 4 board sample */
#define MX6_MMDC_P0_MPDGCTRL0_VAL 0x4327033b
#define MX6_MMDC_P0_MPDGCTRL1_VAL 0x0324031a
#define MX6_MMDC_P1_MPDGCTRL0_VAL 0x43240337
#define MX6_MMDC_P1_MPDGCTRL1_VAL 0x03210269
#define MX6_MMDC_P0_MPRDDLCTL_VAL 0x483c3e4a
#define MX6_MMDC_P1_MPRDDLCTL_VAL 0x423a3848
#define MX6_MMDC_P0_MPWRDLCTL_VAL 0x33363a2c
#define MX6_MMDC_P1_MPWRDLCTL_VAL 0x3e314137
#define MX6_MMDC_P0_MPWLDECTRL0_VAL 0x00200026
#define MX6_MMDC_P0_MPWLDECTRL1_VAL 0x00260021
#define MX6_MMDC_P1_MPWLDECTRL0_VAL 0x00180028
#define MX6_MMDC_P1_MPWLDECTRL1_VAL 0x000f001e
#define WALAT 1
#else
/* ? board sample */
#define MX6_MMDC_P0_MPDGCTRL0_VAL 0x433C0350
#define MX6_MMDC_P0_MPDGCTRL1_VAL 0x03400338
#define MX6_MMDC_P1_MPDGCTRL0_VAL 0x433C0350
#define MX6_MMDC_P1_MPDGCTRL1_VAL 0x03400304
#define MX6_MMDC_P0_MPRDDLCTL_VAL 0x423A3E4A
#define MX6_MMDC_P1_MPRDDLCTL_VAL 0x443A3648
#define MX6_MMDC_P0_MPWRDLCTL_VAL 0x383E4238
#define MX6_MMDC_P1_MPWRDLCTL_VAL 0x42364A3E
#define MX6_MMDC_P0_MPWLDECTRL0_VAL 0x001f0024
#define MX6_MMDC_P0_MPWLDECTRL1_VAL 0x00240021
#define MX6_MMDC_P1_MPWLDECTRL0_VAL 0x00150028
#define MX6_MMDC_P1_MPWLDECTRL1_VAL 0x0009001c
#define WALAT 1
#endif
#include "../common/mx6/ddr-setup.cfg"
#define RANK 1
#define BUS_WIDTH 64
/* H5TC8G63AMR-PBA */
#include "../common/mx6/1066mhz_256mx16-hynix.cfg"
#include "../common/mx6/clocks.cfg"
/*
* Copyright (C) 2013 Boundary Devices
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
#include "asm/arch/mx6-ddr.h"
#include "asm/arch/iomux.h"
#include "asm/arch/crm_regs.h"
/* NC YET */
#define MX6_MMDC_P0_MPDGCTRL0_VAL 0x433C0350
#define MX6_MMDC_P0_MPDGCTRL1_VAL 0x03400338
#define MX6_MMDC_P1_MPDGCTRL0_VAL 0x433C0350
#define MX6_MMDC_P1_MPDGCTRL1_VAL 0x03400304
#define MX6_MMDC_P0_MPRDDLCTL_VAL 0x423A3E4A
#define MX6_MMDC_P1_MPRDDLCTL_VAL 0x443A3648
#define MX6_MMDC_P0_MPWRDLCTL_VAL 0x383E4238
#define MX6_MMDC_P1_MPWRDLCTL_VAL 0x42364A3E
#define MX6_MMDC_P0_MPWLDECTRL0_VAL 0x001f0024
#define MX6_MMDC_P0_MPWLDECTRL1_VAL 0x00240021
#define MX6_MMDC_P1_MPWLDECTRL0_VAL 0x00150028
#define MX6_MMDC_P1_MPWLDECTRL1_VAL 0x0009001c
#define WALAT 1
#include "../common/mx6/ddr-setup.cfg"
#define RANK 0
#define BUS_WIDTH 64
/* MT41K512M16HA-107 IT:A */
#include "../common/mx6/1066mhz_512mx16.cfg"
#include "../common/mx6/clocks.cfg"
/*
* Copyright (C) 2013 Boundary Devices
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
#include "asm/arch/mx6-ddr.h"
#include "asm/arch/iomux.h"
#include "asm/arch/crm_regs.h"
/* ? board sample */
#define MX6_MMDC_P0_MPDGCTRL0_VAL 0x424e024e
#define MX6_MMDC_P0_MPDGCTRL1_VAL 0x02380238
#define MX6_MMDC_P1_MPDGCTRL0_VAL 0x4224022c
#define MX6_MMDC_P1_MPDGCTRL1_VAL 0x021e0222
#define MX6_MMDC_P0_MPRDDLCTL_VAL 0x4545494f
#define MX6_MMDC_P1_MPRDDLCTL_VAL 0x45474943
#define MX6_MMDC_P0_MPWRDLCTL_VAL 0x37392929
#define MX6_MMDC_P1_MPWRDLCTL_VAL 0x2e2e3028
#define MX6_MMDC_P0_MPWLDECTRL0_VAL 0x0052005c
#define MX6_MMDC_P0_MPWLDECTRL1_VAL 0x00420046
#define MX6_MMDC_P1_MPWLDECTRL0_VAL 0x002d002c
#define MX6_MMDC_P1_MPWLDECTRL1_VAL 0x002b003e
#define WALAT 1
#include "../common/mx6/ddr-setup.cfg"
#define RANK 0
#define BUS_WIDTH 64
/* D2516EC4BXGGBI-U */
#include "../common/mx6/800mhz_256mx16.cfg"
#include "../common/mx6/clocks.cfg"
/*
* Copyright (C) 2013 Boundary Devices
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer doc/README.imximage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
#include "asm/arch/mx6-ddr.h"
#include "asm/arch/iomux.h"
#include "asm/arch/crm_regs.h"
/* ? board sample */
#define MX6_MMDC_P0_MPDGCTRL0_VAL 0x424e024e
#define MX6_MMDC_P0_MPDGCTRL1_VAL 0x02380238
#define MX6_MMDC_P1_MPDGCTRL0_VAL 0x4224022c
#define MX6_MMDC_P1_MPDGCTRL1_VAL 0x021e0222
#define MX6_MMDC_P0_MPRDDLCTL_VAL 0x4545494f
#define MX6_MMDC_P1_MPRDDLCTL_VAL 0x45474943
#define MX6_MMDC_P0_MPWRDLCTL_VAL 0x37392929
#define MX6_MMDC_P1_MPWRDLCTL_VAL 0x2e2e3028
#define MX6_MMDC_P0_MPWLDECTRL0_VAL 0x0052005c
#define MX6_MMDC_P0_MPWLDECTRL1_VAL 0x00420046
#define MX6_MMDC_P1_MPWLDECTRL0_VAL 0x002d002c
#define MX6_MMDC_P1_MPWLDECTRL1_VAL 0x002b003e
#define WALAT 1
#include "../common/mx6/ddr-setup.cfg"
#define RANK 1
#define BUS_WIDTH 64
/* H5TC8G63AMR-PBA */
#include "../common/mx6/800mhz_256mx16-hynix.cfg"
#include "../common/mx6/clocks.cfg"
/*
* Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
* Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/sys_proto.h>
#include <malloc.h>
#include <asm/arch/mx6-pins.h>
#include <linux/errno.h>
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/mach-imx/boot_mode.h>
#include <mmc.h>
#include <fsl_esdhc.h>
#include <linux/fb.h>
#include <ipu_pixfmt.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/mxc_hdmi.h>
#include <asm/arch/mx6-ddr.h>
#include <asm/mach-imx/boot_mode.h>
#include <i2c.h>
#include <spl.h>
#if 0
void board_init_f(ulong dummy)
{
#if 0
arch_cpu_init();
board_early_init_f();
timer_init();
preloader_console_init();
print_cpuinfo();
board_init_r(NULL, 0);
#endif
}
#endif
void spl_board_init(void)
{
#if 0
int i;
u32 const *regs ;
int num_regs;
unsigned char mac_address[6];
imx_get_mac_from_fuse(0,mac_address);
printf("ethaddr: %pM\n", mac_address);
if (is_cpu_type(MXC_CPU_MX6Q)) {
#if 1
regs = mx6q_1g;
num_regs = ARRAY_SIZE(mx6q_1g);
#else
regs = mx6q_2g;
num_regs = ARRAY_SIZE(mx6q_2g);
#endif
} else {
#if CONFIG_DDR_MB == 512
regs = mx6dl_512m;
num_regs = ARRAY_SIZE(mx6dl_512m);
printf("Configuring for 512MiB narrow memory bus\n");
#elif CONFIG_DDR_MB == 1024
regs = mx6dl_1gn;
num_regs = ARRAY_SIZE(mx6dl_1gn);
printf("Configuring for 1GiB narrow memory bus\n");
#elif CONFIG_DDR_MB == 2048
regs = mx6dl_2g;
num_regs = ARRAY_SIZE(mx6dl_2g);
printf("Configuring for 2GiB wide memory bus\n");
#endif
}
for (i=0; i < num_regs; i+=2) {
writel(regs[i+1],regs[i]);
}
dram_init();
#endif
printf("%s\n", __func__);
}
u32 spl_boot_device(void)
{
printf("%s\n", __func__);
#if 0
unsigned reg;
struct src *psrc = (struct src *)SRC_BASE_ADDR;
printf("%s: sbmr1 == 0x%08x\n", __func__, psrc->sbmr1);
printf("%s: gpr9 == 0x%08x\n", __func__, psrc->gpr9);
printf("%s: gpr10 == 0x%08x\n", __func__, psrc->gpr10);
return BOOT_DEVICE_USB;
#endif
#if 1
return BOOT_DEVICE_SPI;
#endif
}
#if 0
void spl_usb_load_image(void)
{
boot_mode_apply(MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00));
reset_cpu(0);
}
#endif
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_NITROGEN6_MAX=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6_max/nitrogen6_max_4gr0.cfg,MX6Q,DDR_MB=3840,DEFCONFIG=\"nitrogen6_max_4gr0\""
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DWC_AHSATA=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_FASTBOOT_BUF_SIZE=0x26000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_FEC_MXC=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Boundary"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_ETHER=y
CONFIG_USB_ETH_CDC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_NITROGEN6_MAX=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6_max/nitrogen6_max4g.cfg,MX6Q,DDR_MB=3840,DEFCONFIG=\"nitrogen6_max\""
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DWC_AHSATA=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_FASTBOOT_BUF_SIZE=0x26000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_FEC_MXC=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Boundary"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_ETHER=y
CONFIG_USB_ETH_CDC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_NITROGEN6_MAX=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6_max/nitrogen6_max_dl2g.cfg,MX6DL,DDR_MB=2048,DEFCONFIG=\"nitrogen6_max_dl2g\""
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_FASTBOOT_BUF_SIZE=0x26000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_FEC_MXC=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Boundary"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_ETHER=y
CONFIG_USB_ETH_CDC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_NITROGEN6_MAX=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6_max/nitrogen6_max_dl4g.cfg,MX6DL,DDR_MB=3840,DEFCONFIG=\"nitrogen6_max_dl4g\""
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_FASTBOOT_BUF_SIZE=0x26000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_FEC_MXC=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Boundary"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_ETHER=y
CONFIG_USB_ETH_CDC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_OF_LIBFDT=y
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_TARGET_NITROGEN6_MAX=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6_max/nitrogen6_max4g.cfg,MX6Q,MX6QP,DDR_MB=3840,DEFCONFIG=\"nitrogen6qp_max\""
CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DWC_AHSATA=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_FASTBOOT_BUF_SIZE=0x26000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FSL_ESDHC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_FEC_MXC=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Boundary"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_ETHER=y
CONFIG_USB_ETH_CDC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_OF_LIBFDT=y
/*
* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
*
* Configuration settings for the Boundary Devices Nitrogen6_max
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include "mx6_common.h"
#define CONFIG_MACH_TYPE 3778
#define CONFIG_IMX_HDMI
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define BD_I2C_MASK 7
#include "boundary.h"
#define CONFIG_EXTRA_ENV_SETTINGS BD_BOUNDARY_ENV_SETTINGS \
#endif /* __CONFIG_H */
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