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Jack Humbert
reform-boundary-uboot
Commits
bb65a312
Commit
bb65a312
authored
21 years ago
by
dzu
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Improve SDRAM setup for TRAB board
parent
88a1bfa8
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CHANGELOG
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CHANGELOG
board/trab/memsetup.S
+4
-4
4 additions, 4 deletions
board/trab/memsetup.S
with
6 additions
and
4 deletions
CHANGELOG
+
2
−
0
View file @
bb65a312
...
...
@@ -2,6 +2,8 @@
Changes for U-Boot 1.0.0:
======================================================================
* Improve SDRAM setup for TRAB board
* Suppress all output with splashscreen configured only if "splashimage"
is set
...
...
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board/trab/memsetup.S
+
4
−
4
View file @
bb65a312
...
...
@@ -104,12 +104,12 @@
#ifndef CONFIG_RAM_16MB /* 32 MB RAM */
/*
Bank6
*/
#define B6_MT 0x3 /* SDRAM */
#define B6_Trcd 0x
1
/*
3
clk */
#define B6_Trcd 0x
0
/*
2
clk */
#define B6_SCAN 0x1 /* 9 bit */
/*
Bank7
*/
#define B7_MT 0x3 /* SDRAM */
#define B7_Trcd 0x
1
/*
3
clk */
#define B7_Trcd 0x
0
/*
2
clk */
#define B7_SCAN 0x1 /* 9 bit */
#else /* CONFIG_RAM_16MB = 16 MB RAM */
/*
Bank6
*/
...
...
@@ -178,5 +178,5 @@ SMRDATA:
#else /* CONFIG_RAM_16MB = 16 MB RAM */
.
word
0x17
/*
BUSWIDTH
=
32
,
SCLK
power
saving
mode
,
BANKSIZE
16
M
/
16
M
*/
#endif /* CONFIG_RAM_16MB */
.
word
0x
3
0
/*
MRSR6
,
CL
=
3
clk
*/
.
word
0x
3
0
/*
MRSR7
*/
.
word
0x
2
0
/*
MRSR6
,
CL
=
2
clk
*/
.
word
0x
2
0
/*
MRSR7
*/
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