ses: memory calibration for rev2

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

board/boundary/ses/ses_q2g.cfg

@@ -28,18 +28,18 @@ CSF CONFIG_CSF_SIZE
 #include "asm/arch/crm_regs.h"
 
 /* 5 board sample */
-#define MX6_MMDC_P0_MPDGCTRL0_VAL	0x43160327
-#define MX6_MMDC_P0_MPDGCTRL1_VAL	0x03100307
-#define MX6_MMDC_P1_MPDGCTRL0_VAL	0x031e032c
-#define MX6_MMDC_P1_MPDGCTRL1_VAL	0x0315025c
-#define MX6_MMDC_P0_MPRDDLCTL_VAL	0x40333842
-#define MX6_MMDC_P1_MPRDDLCTL_VAL	0x3b373344
-#define MX6_MMDC_P0_MPWRDLCTL_VAL	0x393c3e32
-#define MX6_MMDC_P1_MPWRDLCTL_VAL	0x4332463e
-#define MX6_MMDC_P0_MPWLDECTRL0_VAL	0x0015001e
-#define MX6_MMDC_P0_MPWLDECTRL1_VAL	0x0024001b
-#define MX6_MMDC_P1_MPWLDECTRL0_VAL	0x00110023
-#define MX6_MMDC_P1_MPWLDECTRL1_VAL	0x000c0017
+#define MX6_MMDC_P0_MPDGCTRL0_VAL	0x43160324
+#define MX6_MMDC_P0_MPDGCTRL1_VAL	0x030e027f
+#define MX6_MMDC_P1_MPDGCTRL0_VAL	0x03180329
+#define MX6_MMDC_P1_MPDGCTRL1_VAL	0x0311025a
+#define MX6_MMDC_P0_MPRDDLCTL_VAL	0x42343943
+#define MX6_MMDC_P1_MPRDDLCTL_VAL	0x3c383246
+#define MX6_MMDC_P0_MPWRDLCTL_VAL	0x38393e32
+#define MX6_MMDC_P1_MPWRDLCTL_VAL	0x4333453e
+#define MX6_MMDC_P0_MPWLDECTRL0_VAL	0x0014001c
+#define MX6_MMDC_P0_MPWLDECTRL1_VAL	0x001d0016
+#define MX6_MMDC_P1_MPWLDECTRL0_VAL	0x000f0020
+#define MX6_MMDC_P1_MPWLDECTRL1_VAL	0x00080017
 #define WALAT	1
 
 #include "../common/mx6/ddr-setup.cfg"