dm: core: Select device tree control correctly for SPL

Some boards will not use device tree for SPL even with driver model. Add
the logic to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>

drivers/core/root.c

@@ -197,13 +197,15 @@ int dm_init_and_scan(bool pre_reloc_only)
 		debug("dm_scan_platdata() failed: %d\n", ret);
 		return ret;
 	}
-#ifdef CONFIG_OF_CONTROL
+
+	if (OF_CONTROL) {
 		ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
 		if (ret) {
 			debug("dm_scan_fdt() failed: %d\n", ret);
 			return ret;
 		}
-#endif
+	}
+
 	ret = dm_scan_other(pre_reloc_only);
 	if (ret)
 		return ret;

include/fdtdec.h

@@ -41,6 +41,16 @@ struct fdt_memory {
 	fdt_addr_t end;
 };
 
+#ifdef CONFIG_OF_CONTROL
+# if defined(CONFIG_SPL_BUILD) && defined(SPL_DISABLE_OF_CONTROL)
+#  define OF_CONTROL 0
+# else
+#  define OF_CONTROL 1
+# endif
+#else
+# define OF_CONTROL 0
+#endif
+
 /*
  * Information about a resource. start is the first address of the resource
  * and end is the last address (inclusive). The length of the resource will