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Commit ae625ae5 authored by Marek Vasut's avatar Marek Vasut Committed by Tom Rini
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ARM: at91: ma5d4: Switch DDR2 controller to sequencial address decoding


According to the datasheet, sequential mapping is used for DDR
SDRAM, while interleaved mapping is used for regular SDRAM.
Incorrect configuration of this bit does indeed cause sporadic
memory instability.

Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
parent f1d56dff
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