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Commit aaec4487 authored by SRICHARAN R's avatar SRICHARAN R Committed by Albert ARIBAUD
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OMAP4/5: emif: Correct the emif power mgt shadow register bit fields.


PD_TIM bit field which specifies the power down timing is defined
to occupy bits 8-11, where as it is actually from 12-15 bits.
So correcting this.

Signed-off-by: default avatarR Sricharan <r.sricharan@ti.com>
parent 971f2ba2
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......@@ -226,8 +226,8 @@
#define EMIF_REG_CS_TIM_MASK (0xf << 0)
/* PWR_MGMT_CTRL_SHDW */
#define EMIF_REG_PD_TIM_SHDW_SHIFT 8
#define EMIF_REG_PD_TIM_SHDW_MASK (0xf << 8)
#define EMIF_REG_PD_TIM_SHDW_SHIFT 12
#define EMIF_REG_PD_TIM_SHDW_MASK (0xf << 12)
#define EMIF_REG_SR_TIM_SHDW_SHIFT 4
#define EMIF_REG_SR_TIM_SHDW_MASK (0xf << 4)
#define EMIF_REG_CS_TIM_SHDW_SHIFT 0
......
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