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Commit a4958313 authored by Peter Meerwald's avatar Peter Meerwald Committed by Albert ARIBAUD
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omap3: fix comment typos 


Signed-off-by: default avatarPeter Meerwald <p.meerwald@bct-electronic.com>
parent 66327eb3
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arch/arm/cpu/armv7/omap3/board.c
+ 2
− 2
View file @ a4958313
...@@ -144,7 +144,7 @@ void secureworld_exit() ...@@ -144,7 +144,7 @@ void secureworld_exit()
{ {
unsigned long i; unsigned long i;
/* configrue non-secure access control register */ /* configure non-secure access control register */
__asm__ __volatile__("mrc p15, 0, %0, c1, c1, 2":"=r"(i)); __asm__ __volatile__("mrc p15, 0, %0, c1, c1, 2":"=r"(i));
/* enabling co-processor CP10 and CP11 accesses in NS world */ /* enabling co-processor CP10 and CP11 accesses in NS world */
__asm__ __volatile__("orr %0, %0, #0xC00":"=r"(i)); __asm__ __volatile__("orr %0, %0, #0xC00":"=r"(i));
...@@ -393,7 +393,7 @@ static void omap3_setup_aux_cr(void) ...@@ -393,7 +393,7 @@ static void omap3_setup_aux_cr(void)
{ {
/* Workaround for Cortex-A8 errata: #454179 #430973 /* Workaround for Cortex-A8 errata: #454179 #430973
* Set "IBE" bit * Set "IBE" bit
* Set "Disable Brach Size Mispredicts" bit * Set "Disable Branch Size Mispredicts" bit
* Workaround for erratum #621766 * Workaround for erratum #621766
* Enable L1NEON bit * Enable L1NEON bit
* ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0 * ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0
......
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