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Commit a2c74aaf authored by Peng Fan's avatar Peng Fan Committed by Stefano Babic
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imx: mx6ul select SYS_L2CACHE_OFF


i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6
chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled.
There is on specific switch for on/off L2 Cache, so default select
SYS_L2CACHE_OFF.

Signed-off-by: default avatarPeng Fan <Peng.Fan@freescale.com>
parent 43cb127b
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...@@ -25,6 +25,10 @@ config MX6SL ...@@ -25,6 +25,10 @@ config MX6SL
config MX6SX config MX6SX
bool bool
config MX6UL
select SYS_L2CACHE_OFF
bool
choice choice
prompt "MX6 board select" prompt "MX6 board select"
optional optional
......
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