nitrogen8m_som: change SPL memory usage

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

board/boundary/nitrogen8m_som/spl.c

@@ -177,17 +177,6 @@ int power_init_board(void)
 
 void spl_board_init(void)
 {
-	enable_tzc380();
-	imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads));
-
-	/* Adjust pmic voltage to 1.0V for 800M */
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
-	power_init_board();
-
-	/* DDR initialization */
-	spl_dram_init();
-
 #ifndef CONFIG_SPL_USB_SDP_SUPPORT
 	/* Serial download mode */
 	if (is_usb_boot()) {
@@ -210,6 +199,8 @@ int board_fit_config_name_match(const char *name)
 
 void board_init_f(ulong dummy)
 {
+	int ret;
+
 	/* Clear global data */
 	memset((void *)gd, 0, sizeof(gd_t));
 
@@ -224,5 +215,22 @@ void board_init_f(ulong dummy)
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
+	ret = spl_init();
+	if (ret) {
+		printf("spl_init() failed: %d\n", ret);
+		hang();
+	}
+
+	enable_tzc380();
+	imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads));
+
+	/* Adjust pmic voltage to 1.0V for 800M */
+	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+
+	power_init_board();
+
+	/* DDR initialization */
+	spl_dram_init();
+
 	board_init_r(NULL, 0);
 }

include/configs/nitrogen8m_som.h

@@ -22,13 +22,15 @@
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 
 #ifdef CONFIG_SPL_BUILD
+
 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
 #define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
-#define CONFIG_SPL_STACK		0x187FF0
-#define CONFIG_SPL_BSS_START_ADDR      0x00180000
-#define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START    0x00182000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x2000	/* 8 KB */
+#define CONFIG_SPL_STACK		0x00187FF0
+#define CONFIG_SPL_BSS_START_ADDR	0x00180000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x00002000	/* 8 KB */
+#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000	/* 512 KB */
+#define CONFIG_MALLOC_F_ADDR		0x00182000	/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
 #define CONFIG_SYS_ICACHE_OFF
 #define CONFIG_SYS_DCACHE_OFF