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Commit 8ed20d65 authored by Stefan Roese's avatar Stefan Roese Committed by Luka Perkov
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arm: mvebu: Change MBUS base addresses and sizes


This patch changes the MBUS base addresses and sizes to use more
generic names and also adds defines for the sizes. It also moves
the base address to higher addresses.

Signed-off-by: default avatarStefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
parent 2bd8711e
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......@@ -19,18 +19,20 @@
static struct mbus_win windows[] = {
/* PCIE MEM address space */
{ DEFADR_PCI_MEM, 256 << 20, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
{ MBUS_PCI_MEM_BASE, MBUS_PCI_MEM_SIZE,
CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
/* PCIE IO address space */
{ DEFADR_PCI_IO, 64 << 10, CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
{ MBUS_PCI_IO_BASE, MBUS_PCI_IO_SIZE,
CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
/* SPI */
{ DEFADR_SPIF, 8 << 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
CPU_ATTR_SPIFLASH },
{ MBUS_SPI_BASE, MBUS_SPI_SIZE,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPIFLASH },
/* NOR */
{ DEFADR_BOOTROM, 8 << 20, CPU_TARGET_DEVICEBUS_BOOTROM_SPI,
CPU_ATTR_BOOTROM },
{ MBUS_BOOTROM_BASE, MBUS_BOOTROM_SIZE,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_BOOTROM },
};
void reset_cpu(unsigned long ignored)
......
......@@ -65,10 +65,14 @@ enum {
/*
* Default Device Address MAP BAR values
*/
#define DEFADR_PCI_MEM 0x90000000
#define DEFADR_PCI_IO 0xC0000000
#define DEFADR_SPIF 0xF4000000
#define DEFADR_BOOTROM 0xF8000000
#define MBUS_PCI_MEM_BASE 0xE8000000
#define MBUS_PCI_MEM_SIZE (128 << 20)
#define MBUS_PCI_IO_BASE 0xF1100000
#define MBUS_PCI_IO_SIZE (64 << 10)
#define MBUS_SPI_BASE 0xF4000000
#define MBUS_SPI_SIZE (8 << 20)
#define MBUS_BOOTROM_BASE 0xF8000000
#define MBUS_BOOTROM_SIZE (8 << 20)
struct mbus_win {
u32 base;
......
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