Skip to content
Snippets Groups Projects
Commit 8c618dd6 authored by Prabhakar Kushwaha's avatar Prabhakar Kushwaha Committed by York Sun
Browse files

board/t1040qds: Enable memory reset control


Define QIXIS_RST_FORCE_MEM to reset on-board DDR-DIMM before start
accessing it.

Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
parent 3bce144b
No related branches found
No related tags found
No related merge requests found
...@@ -239,3 +239,8 @@ void qixis_dump_switch(void) ...@@ -239,3 +239,8 @@ void qixis_dump_switch(void)
printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1])); printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));
} }
} }
int board_need_mem_reset(void)
{
return 1;
}
...@@ -233,6 +233,7 @@ unsigned long get_board_ddr_clk(void); ...@@ -233,6 +233,7 @@ unsigned long get_board_ddr_clk(void);
#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21
#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
#define QIXIS_RST_FORCE_MEM 0x01
#define CONFIG_SYS_CSPR3_EXT (0xf) #define CONFIG_SYS_CSPR3_EXT (0xf)
#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment