ppc/85xx: Cleanup makefile and related optional files

Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious cases
we have like PCI, CPM2, QE.  Also reworked it to use one line per file
for everything and sorted in alphabetical order.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

cpu/mpc85xx/Makefile

@@ -29,10 +29,10 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(CPU).a
 
 START	= start.o resetvec.o
-SOBJS-$(CONFIG_MP) += release.o
+SOBJS-$(CONFIG_MP)	+= release.o
 SOBJS	= $(SOBJS-y)
-COBJS-$(CONFIG_MP) += mp.o
-COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+
+COBJS-$(CONFIG_CPM2)	+= commproc.o
 
 # supports ddr1
 COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
@@ -54,10 +54,21 @@ COBJS-$(CONFIG_P1020)	+= ddr-gen3.o
 COBJS-$(CONFIG_P2010)	+= ddr-gen3.o
 COBJS-$(CONFIG_P2020)	+= ddr-gen3.o
 
+COBJS-$(CONFIG_CPM2)	+= ether_fcc.o
+COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+COBJS-$(CONFIG_MP)	+= mp.o
 COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
-COBJS	= traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
-	  pci.o serial_scc.o commproc.o ether_fcc.o qe_io.o \
-	  $(COBJS-y)
+COBJS-$(CONFIG_PCI)	+= pci.o
+COBJS-$(CONFIG_QE)	+= qe_io.o
+COBJS-$(CONFIG_CPM2)	+= serial_scc.o
+
+COBJS	= $(COBJS-y)
+COBJS	+= cpu.o
+COBJS	+= cpu_init.o
+COBJS	+= interrupts.o
+COBJS	+= speed.o
+COBJS	+= tlb.o
+COBJS	+= traps.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))

cpu/mpc85xx/commproc.c

@@ -26,7 +26,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_CPM2)
 /*
  * because we have stack and init data in dual port ram
  * we must reduce the size
@@ -204,5 +203,3 @@ ulong post_word_load (void)
 }
 
 #endif	/* CONFIG_POST */
-
-#endif /* CONFIG_CPM2 */

cpu/mpc85xx/ether_fcc.c

@@ -52,8 +52,6 @@
 #include <miiphy.h>
 #endif
 
-#if defined(CONFIG_CPM2)
-
 #if defined(CONFIG_ETHER_ON_FCC) && defined(CONFIG_CMD_NET) && \
 	defined(CONFIG_NET_MULTI)
 
@@ -469,5 +467,3 @@ int fec_initialize(bd_t *bis)
 }
 
 #endif
-
-#endif /* CONFIG_CPM2 */

cpu/mpc85xx/pci.c

@@ -29,7 +29,7 @@
 #include <asm/cpm_85xx.h>
 #include <pci.h>
 
-#if defined(CONFIG_PCI) && !defined(CONFIG_FSL_PCI_INIT)
+#if !defined(CONFIG_FSL_PCI_INIT)
 
 #ifndef CONFIG_SYS_PCI1_MEM_BUS
 #define CONFIG_SYS_PCI1_MEM_BUS CONFIG_SYS_PCI1_MEM_BASE
@@ -227,4 +227,4 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
 	hose->last_busno = pci_hose_scan(hose);
 #endif
 }
-#endif /* CONFIG_PCI */
+#endif /* !CONFIG_FSL_PCI_INIT */

cpu/mpc85xx/serial_scc.c

@@ -37,7 +37,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_CPM2)
 #if defined(CONFIG_CONS_ON_SCC)
 
 #if CONFIG_CONS_INDEX == 1	/* Console on SCC1 */
@@ -267,5 +266,3 @@ serial_tstc()
 }
 
 #endif	/* CONFIG_CONS_ON_SCC */
-
-#endif /* CONFIG_CPM2 */