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Commit 871d78ed authored by Alexandre Courbot's avatar Alexandre Courbot Committed by Tom Warren
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ARM: tegra: move VPR configuration to a later stage


U-boot is responsible for enabling the GPU DT node after all necessary
configuration (VPR setup for T124) is performed. In order to be able to
check whether this configuration has been performed right before booting
the kernel, make it happen during board_init().

Also move VPR configuration into the more generic gpu.c file, which will
also host other GPU-related functions, and let boards specify
individually whether they need VPR setup or not.

Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: default avatarTom Warren <twarren@nvidia.com>
parent 95486f84
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...@@ -64,15 +64,6 @@ int tegra_get_sku_info(void); ...@@ -64,15 +64,6 @@ int tegra_get_sku_info(void);
/* Do any chip-specific cache config */ /* Do any chip-specific cache config */
void config_cache(void); void config_cache(void);
#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210)
/* Do chip-specific vpr config */
void config_vpr(void);
#else
static inline void config_vpr(void)
{
}
#endif
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
bool tegra_cpu_is_non_secure(void); bool tegra_cpu_is_non_secure(void);
#endif #endif
/*
* (C) Copyright 2015
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARCH_TEGRA_GPU_H
#define __ASM_ARCH_TEGRA_GPU_H
#if defined(CONFIG_TEGRA_GPU)
void config_gpu(void);
bool gpu_configured(void);
#else /* CONFIG_TEGRA_GPU */
static inline void config_gpu(void)
{
}
static inline bool gpu_configured(void)
{
return false;
}
#endif /* CONFIG_TEGRA_GPU */
...@@ -24,9 +24,7 @@ obj-y += pinmux-common.o ...@@ -24,9 +24,7 @@ obj-y += pinmux-common.o
obj-y += powergate.o obj-y += powergate.o
obj-y += xusb-padctl.o obj-y += xusb-padctl.o
obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
#TCW Fix this to use a common config switch (CONFIG_LOCK_VPR?) obj-$(CONFIG_TEGRA_GPU) += gpu.o
obj-$(CONFIG_TEGRA124) += vpr.o
obj-$(CONFIG_TEGRA210) += vpr.o
obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
ifndef CONFIG_SPL_BUILD ifndef CONFIG_SPL_BUILD
......
...@@ -226,8 +226,5 @@ void s_init(void) ...@@ -226,8 +226,5 @@ void s_init(void)
/* enable SMMU */ /* enable SMMU */
smmu_enable(); smmu_enable();
/* init vpr */
config_vpr();
} }
#endif #endif
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include <asm/arch-tegra/sys_proto.h> #include <asm/arch-tegra/sys_proto.h>
#include <asm/arch-tegra/uart.h> #include <asm/arch-tegra/uart.h>
#include <asm/arch-tegra/warmboot.h> #include <asm/arch-tegra/warmboot.h>
#include <asm/arch-tegra/gpu.h>
#ifdef CONFIG_TEGRA_CLOCK_SCALING #ifdef CONFIG_TEGRA_CLOCK_SCALING
#include <asm/arch/emc.h> #include <asm/arch/emc.h>
#endif #endif
...@@ -126,6 +127,8 @@ int board_init(void) ...@@ -126,6 +127,8 @@ int board_init(void)
clock_init(); clock_init();
clock_verify(); clock_verify();
config_gpu();
#ifdef CONFIG_TEGRA_SPI #ifdef CONFIG_TEGRA_SPI
pin_mux_spi(); pin_mux_spi();
#endif #endif
......
/* /*
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
...@@ -21,8 +21,11 @@ ...@@ -21,8 +21,11 @@
#include <asm/arch/tegra.h> #include <asm/arch/tegra.h>
#include <asm/arch/mc.h> #include <asm/arch/mc.h>
/* Configures VPR. Right now, all we do is turn it off. */ #include <fdt_support.h>
void config_vpr(void)
static bool _configured;
void config_gpu(void)
{ {
struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE; struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
...@@ -32,4 +35,13 @@ void config_vpr(void) ...@@ -32,4 +35,13 @@ void config_vpr(void)
&mc->mc_video_protect_reg_ctrl); &mc->mc_video_protect_reg_ctrl);
/* read back to ensure the write went through */ /* read back to ensure the write went through */
readl(&mc->mc_video_protect_reg_ctrl); readl(&mc->mc_video_protect_reg_ctrl);
debug("configured VPR\n");
_configured = true;
}
bool vpr_configured(void)
{
return _configured;
} }
...@@ -70,4 +70,7 @@ ...@@ -70,4 +70,7 @@
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
/* GPU needs setup */
#define CONFIG_TEGRA_GPU
#endif /* _TEGRA124_COMMON_H_ */ #endif /* _TEGRA124_COMMON_H_ */
...@@ -73,4 +73,7 @@ ...@@ -73,4 +73,7 @@
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
/* GPU needs setup */
#define CONFIG_TEGRA_GPU
#endif /* _TEGRA210_COMMON_H_ */ #endif /* _TEGRA210_COMMON_H_ */
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