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Commit 8165e34b authored by Stephen Warren's avatar Stephen Warren Committed by Marek Vasut
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usb: ehci: fully align interrupt QHs/QTDs


These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment requirements.
That means aligning to USB_DMA_MINALIGN. This is important on systems
where cache lines are >32 bytes.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 2456b97f
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...@@ -1162,14 +1162,16 @@ create_int_queue(struct usb_device *dev, unsigned long pipe, int queuesize, ...@@ -1162,14 +1162,16 @@ create_int_queue(struct usb_device *dev, unsigned long pipe, int queuesize,
debug("ehci intr queue: out of memory\n"); debug("ehci intr queue: out of memory\n");
goto fail1; goto fail1;
} }
result->first = memalign(32, sizeof(struct QH) * queuesize); result->first = memalign(USB_DMA_MINALIGN,
sizeof(struct QH) * queuesize);
if (!result->first) { if (!result->first) {
debug("ehci intr queue: out of memory\n"); debug("ehci intr queue: out of memory\n");
goto fail2; goto fail2;
} }
result->current = result->first; result->current = result->first;
result->last = result->first + queuesize - 1; result->last = result->first + queuesize - 1;
result->tds = memalign(32, sizeof(struct qTD) * queuesize); result->tds = memalign(USB_DMA_MINALIGN,
sizeof(struct qTD) * queuesize);
if (!result->tds) { if (!result->tds) {
debug("ehci intr queue: out of memory\n"); debug("ehci intr queue: out of memory\n");
goto fail3; goto fail3;
......
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