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Commit 77fa0457 authored by Peng Fan's avatar Peng Fan Committed by Stefano Babic
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imx: imx7ulp: add EVK board support 


Add EVK board support.
Add the evk dts file.

LOG:
U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800)

CPU:   Freescale i.MX7ULP rev1.0 at 500 MHz
Reset cause: POR
Boot mode: Dual boot
Model: NXP i.MX7ULP EVK
DRAM:  1 GiB
MMC:   FSL_SDHC: 0
In:    serial@402D0000
Out:   serial@402D0000
Err:   serial@402D0000
Net:   Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot:  0

Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
parent b60f1457
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arch/arm/cpu/armv7/mx7ulp/Kconfig
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......@@ -3,4 +3,15 @@ if ARCH_MX7ULP
config SYS_SOC
default "mx7ulp"
choice
prompt "MX7ULP board select"
optional
config TARGET_MX7ULP_EVK
bool "Support mx7ulp EVK board"
endchoice
source "board/freescale/mx7ulp_evk/Kconfig"
endif
arch/arm/dts/Makefile
+ 2
− 0
View file @ 77fa0457
......@@ -320,6 +320,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
dtb-$(CONFIG_MX7) += imx7-colibri.dtb
dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2l-evm.dtb \
keystone-k2e-evm.dtb \
......
arch/arm/dts/imx7ulp-evk.dts 0 → 100644
+ 426
− 0
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/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "imx7ulp.dtsi"
/ {
model = "NXP i.MX7ULP EVK";
compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp", "Generic DT based system";
chosen {
bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x402D0010,115200";
stdout-path = &lpuart4;
};
bcmdhd_wlan_0: bcmdhd_wlan@0 {
compatible = "android,bcmdhd_wlan";
wlreg_on-supply = <&wlreg_on>;
bcmdhd_fw = "/lib/firmware/bcm/1DX_BCM4343W/fw_bcmdhd.bin";
bcmdhd_nv = "/lib/firmware/bcm/1DX_BCM4343W/bcmdhd.1DX.SDIO.cal";
};
memory {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};
backlight {
compatible = "gpio-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
default-on;
status = "okay";
};
mipi_dsi_reset: mipi-dsi-reset {
compatible = "gpio-reset";
reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
reset-delay-us = <1000>;
#reset-cells = <0>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
wlreg_on: fixedregulator@100 {
compatible = "regulator-fixed";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "wlreg_on";
gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
startup-delay-us = <100>;
enable-active-high;
};
reg_usb_otg1_vbus: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1>;
regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_vsd_3v3: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "VSD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_vsd_3v3b: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "VSD_3V3B";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
extcon_usb1: extcon_usb1 {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_extcon_usb1>;
};
pf1550-rpmsg {
compatible = "fsl,pf1550-rpmsg";
sw1_reg: SW1 {
regulator-name = "SW1";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1387500>;
regulator-boot-on;
regulator-always-on;
};
sw2_reg: SW2 {
regulator-name = "SW2";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1387500>;
regulator-boot-on;
regulator-always-on;
};
sw3_reg: SW3 {
regulator-name = "SW3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: VREFDDR {
regulator-name = "VREFDDR";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
vldo1_reg: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vldo2_reg: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vldo3_reg: LDO3 {
regulator-name = "LDO3";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
&iomuxc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_1>;
imx7ulp-evk {
pinctrl_hog_1: hoggrp-1 {
fsl,pins = <
ULP1_PAD_PTC10__PTC10 0x30100 /* USDHC0 CD */
ULP1_PAD_PTC1__PTC1 0x20100
ULP1_PAD_PTD0__PTD0 0x30100 /* USDHC0 RST */
ULP1_PAD_PTE13__PTE13 0x30103 /* USDHC1 CD */
ULP1_PAD_PTE12__PTE12 0x30103 /* USDHC1 WP */
ULP1_PAD_PTE14__SDHC1_VS 0x843 /* USDHC1 VSEL */
>;
};
pinctrl_backlight: backlight_grp {
fsl,pins = <
ULP1_PAD_PTF2__PTF2 0x20100
>;
};
pinctrl_lpi2c5: lpi2c5grp {
fsl,pins = <
ULP1_PAD_PTC4__LPI2C5_SCL 0x527
ULP1_PAD_PTC5__LPI2C5_SDA 0x527
>;
};
pinctrl_mipi_dsi_reset: mipi_dsi_reset_grp {
fsl,pins = <
ULP1_PAD_PTC19__PTC19 0x20103
>;
};
pinctrl_lpuart4: lpuart4grp {
fsl,pins = <
ULP1_PAD_PTC3__LPUART4_RX 0x400
ULP1_PAD_PTC2__LPUART4_TX 0x400
>;
};
pinctrl_lpuart6: lpuart6grp {
fsl,pins = <
ULP1_PAD_PTE10__LPUART6_TX 0x400
ULP1_PAD_PTE11__LPUART6_RX 0x400
ULP1_PAD_PTE9__LPUART6_RTS_B 0x400
ULP1_PAD_PTE8__LPUART6_CTS_B 0x400
ULP1_PAD_PTE7__PTE7 0x00 /* BT_REG_ON */
>;
};
pinctrl_lpuart7: lpuart7grp {
fsl,pins = <
ULP1_PAD_PTF14__LPUART7_TX 0x400
ULP1_PAD_PTF15__LPUART7_RX 0x400
ULP1_PAD_PTF13__LPUART7_RTS_B 0x400
ULP1_PAD_PTF12__LPUART7_CTS_B 0x400
>;
};
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
ULP1_PAD_PTD1__SDHC0_CMD 0x843
ULP1_PAD_PTD2__SDHC0_CLK 0x10843
ULP1_PAD_PTD7__SDHC0_D3 0x843
ULP1_PAD_PTD8__SDHC0_D2 0x843
ULP1_PAD_PTD9__SDHC0_D1 0x843
ULP1_PAD_PTD10__SDHC0_D0 0x843
>;
};
pinctrl_usdhc0_8bit: usdhc0grp_8bit {
fsl,pins = <
ULP1_PAD_PTD1__SDHC0_CMD 0x843
ULP1_PAD_PTD2__SDHC0_CLK 0x843
ULP1_PAD_PTD3__SDHC0_D7 0x843
ULP1_PAD_PTD4__SDHC0_D6 0x843
ULP1_PAD_PTD5__SDHC0_D5 0x843
ULP1_PAD_PTD6__SDHC0_D4 0x843
ULP1_PAD_PTD7__SDHC0_D3 0x843
ULP1_PAD_PTD8__SDHC0_D2 0x843
ULP1_PAD_PTD9__SDHC0_D1 0x843
ULP1_PAD_PTD10__SDHC0_D0 0x843
>;
};
pinctrl_lpi2c7: lpi2c7grp {
fsl,pins = <
ULP1_PAD_PTF12__LPI2C7_SCL 0x527
ULP1_PAD_PTF13__LPI2C7_SDA 0x527
>;
};
pinctrl_lpspi3: lpspi3grp {
fsl,pins = <
ULP1_PAD_PTF16__LPSPI3_SIN 0x300
ULP1_PAD_PTF17__LPSPI3_SOUT 0x300
ULP1_PAD_PTF18__LPSPI3_SCK 0x300
ULP1_PAD_PTF19__LPSPI3_PCS0 0x300
>;
};
pinctrl_usb_otg1: usbotg1grp {
fsl,pins = <
ULP1_PAD_PTC0__PTC0 0x30100
>;
};
pinctrl_extcon_usb1: extcon1grp {
fsl,pins = <
ULP1_PAD_PTC8__PTC8 0x30103
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
ULP1_PAD_PTE3__SDHC1_CMD 0x843
ULP1_PAD_PTE2__SDHC1_CLK 0x843
ULP1_PAD_PTE1__SDHC1_D0 0x843
ULP1_PAD_PTE0__SDHC1_D1 0x843
ULP1_PAD_PTE5__SDHC1_D2 0x843
ULP1_PAD_PTE4__SDHC1_D3 0x843
>;
};
pinctrl_usdhc1_rst: usdhc1grp_rst {
fsl,pins = <
ULP1_PAD_PTE11__PTE11 0x30100 /* USDHC1 RST */
>;
};
pinctrl_wifi: wifigrp {
fsl,pins = <
ULP1_PAD_PTE6__PTE6 0x43 /* WL_REG_ON */
>;
};
};
};
&lcdif {
status = "okay";
disp-dev = "mipi_dsi_northwest";
display = <&display0>;
display0: display {
bits-per-pixel = <16>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <9200000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <8>;
hback-porch = <4>;
hsync-len = <41>;
vback-porch = <2>;
vfront-porch = <4>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&lpi2c7 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpi2c7>;
};
&lpi2c5 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpi2c5>;
status = "okay";
fxas2100x@20 {
compatible = "fsl,fxas2100x";
reg = <0x20>;
};
fxos8700@1e {
compatible = "fsl,fxos8700";
reg = <0x1e>;
};
mpl3115@60 {
compatible = "fsl,mpl3115";
reg = <0x60>;
};
};
&lpspi3 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi3>;
status = "okay";
spidev0: spi@0 {
reg = <0>;
compatible = "rohm,dh2228fv";
spi-max-frequency = <1000000>;
};
};
&mipi_dsi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mipi_dsi_reset>;
lcd_panel = "TRULY-WVGA-TFT3P5581E";
resets = <&mipi_dsi_reset>;
status = "okay";
};
&lpuart4 { /* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart4>;
status = "okay";
};
&lpuart6 { /* BT */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart6>;
status = "okay";
};
&lpuart7 { /* Uart test */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart7>;
status = "disabled";
};
&rpmsg{
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usb_otg1_vbus>;
extcon = <0>, <&extcon_usb1>;
srp-disable;
hnp-disable;
adp-disable;
status = "okay";
};
&usdhc0 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc0>;
pinctrl-1 = <&pinctrl_usdhc0>;
pinctrl-2 = <&pinctrl_usdhc0>;
pinctrl-3 = <&pinctrl_usdhc0>;
cd-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_vsd_3v3>;
vqmmc-supply = <&vldo2_reg>;
status = "okay";
};
arch/arm/dts/imx7ulp-uboot.dtsi 0 → 100644
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− 0
View file @ 77fa0457
/*
* Copyright 2015-2016 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
&soc {
u-boot,dm-pre-reloc;
};
&ahbbridge0 {
u-boot,dm-pre-reloc;
};
&ahbbridge1 {
u-boot,dm-pre-reloc;
};
&iomuxc {
u-boot,dm-pre-reloc;
};
&iomuxc1 {
u-boot,dm-pre-reloc;
};
&lpuart4 {
u-boot,dm-pre-reloc;
};
&lpuart5 {
u-boot,dm-pre-reloc;
};
&lpuart6 {
u-boot,dm-pre-reloc;
};
&lpuart7 {
u-boot,dm-pre-reloc;
};
board/freescale/mx7ulp_evk/Kconfig 0 → 100644
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if TARGET_MX7ULP_EVK
config SYS_BOARD
default "mx7ulp_evk"
config SYS_VENDOR
default "freescale"
config SYS_CONFIG_NAME
default "mx7ulp_evk"
endif
board/freescale/mx7ulp_evk/MAINTAINERS 0 → 100644
+ 7
− 0
View file @ 77fa0457
MX7ULPEVK BOARD
M: Peng Fan <peng.fan@nxp.com>
S: Maintained
F: board/freescale/mx7ulp_evk/
F: include/configs/mx7ulp_evk.h
F: configs/mx7ulp_evk_defconfig
F: configs/mx7ulp_evk_plugin_defconfig
board/freescale/mx7ulp_evk/Makefile 0 → 100644
+ 10
− 0
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# (C) Copyright 2016 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := mx7ulp_evk.o
extra-$(CONFIG_USE_PLUGIN) := plugin.bin
$(obj)/plugin.bin: $(obj)/plugin.o
$(OBJCOPY) -O binary --gap-fill 0xff $< $@
board/freescale/mx7ulp_evk/imximage.cfg 0 → 100644
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− 0
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/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
BOOT_FROM sd
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx7ulp_evk/plugin.bin 0x2F020000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x403f00dc 0x00000000
DATA 4 0x403e0040 0x01000020
DATA 4 0x403e0500 0x01000000
DATA 4 0x403e050c 0x80808080
DATA 4 0x403e0508 0x00140000
DATA 4 0x403E0510 0x00000004
DATA 4 0x403E0514 0x00000002
DATA 4 0x403e0500 0x00000001
CHECK_BITS_SET 4 0x403e0500 0x01000000
DATA 4 0x403e050c 0x8080801E
CHECK_BITS_SET 4 0x403e050c 0x00000040
DATA 4 0x403E0030 0x00000001
DATA 4 0x403e0040 0x11000020
DATA 4 0x403f00dc 0x42000000
DATA 4 0x40B300AC 0x40000000
DATA 4 0x40AD0128 0x00040000
DATA 4 0x40AD00F8 0x00000000
DATA 4 0x40AD00D8 0x00000180
DATA 4 0x40AD0108 0x00000180
DATA 4 0x40AD0104 0x00000180
DATA 4 0x40AD0124 0x00010000
DATA 4 0x40AD0080 0x0000018C
DATA 4 0x40AD0084 0x0000018C
DATA 4 0x40AD0088 0x0000018C
DATA 4 0x40AD008C 0x0000018C
DATA 4 0x40AD0120 0x00010000
DATA 4 0x40AD010C 0x00000180
DATA 4 0x40AD0110 0x00000180
DATA 4 0x40AD0114 0x00000180
DATA 4 0x40AD0118 0x00000180
DATA 4 0x40AD0090 0x00000180
DATA 4 0x40AD0094 0x00000180
DATA 4 0x40AD0098 0x00000180
DATA 4 0x40AD009C 0x00000180
DATA 4 0x40AD00E0 0x00040000
DATA 4 0x40AD00E4 0x00040000
DATA 4 0x40AB001C 0x00008000
DATA 4 0x40AB0800 0xA1390003
DATA 4 0x40AB085C 0x0D3900A0
DATA 4 0x40AB0890 0x00400000
DATA 4 0x40AB0848 0x40404040
DATA 4 0x40AB0850 0x40404040
DATA 4 0x40AB081C 0x33333333
DATA 4 0x40AB0820 0x33333333
DATA 4 0x40AB0824 0x33333333
DATA 4 0x40AB0828 0x33333333
DATA 4 0x40AB082C 0xf3333333
DATA 4 0x40AB0830 0xf3333333
DATA 4 0x40AB0834 0xf3333333
DATA 4 0x40AB0838 0xf3333333
DATA 4 0x40AB08C0 0x24922492
DATA 4 0x40AB08B8 0x00000800
DATA 4 0x40AB0004 0x00020052
DATA 4 0x40AB000C 0x292C42F3
DATA 4 0x40AB0010 0x00100A22
DATA 4 0x40AB0038 0x00120556
DATA 4 0x40AB0014 0x00C700DB
DATA 4 0x40AB0018 0x00211718
DATA 4 0x40AB002C 0x0F9F26D2
DATA 4 0x40AB0030 0x009F0E10
DATA 4 0x40AB0040 0x0000003F
DATA 4 0x40AB0000 0xC3190000
DATA 4 0x40AB001C 0x00008050
DATA 4 0x40AB001C 0x00008058
DATA 4 0x40AB001C 0x003F8030
DATA 4 0x40AB001C 0x003F8038
DATA 4 0x40AB001C 0xFF0A8030
DATA 4 0x40AB001C 0xFF0A8038
DATA 4 0x40AB001C 0x04028030
DATA 4 0x40AB001C 0x04028038
DATA 4 0x40AB001C 0x83018030
DATA 4 0x40AB001C 0x83018038
DATA 4 0x40AB001C 0x01038030
DATA 4 0x40AB001C 0x01038038
DATA 4 0x40AB083C 0x20000000
DATA 4 0x40AB0020 0x00001800
DATA 4 0x40AB0800 0xA1310000
DATA 4 0x40AB0004 0x00020052
DATA 4 0x40AB0404 0x00011006
DATA 4 0x40AB001C 0x00000000
#endif
board/freescale/mx7ulp_evk/mx7ulp_evk.c 0 → 100644
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/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mx7ulp-pins.h>
#include <asm/arch/iomux.h>
DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PUS_UP)
int dram_init(void)
{
gd->ram_size = PHYS_SDRAM_SIZE;
return 0;
}
static iomux_cfg_t const lpuart4_pads[] = {
MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static void setup_iomux_uart(void)
{
mx7ulp_iomux_setup_multiple_pads(lpuart4_pads,
ARRAY_SIZE(lpuart4_pads));
}
int board_early_init_f(void)
{
setup_iomux_uart();
return 0;
}
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
return 0;
}
board/freescale/mx7ulp_evk/plugin.S 0 → 100644
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− 0
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/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
.macro imx7ulp_ddr_freq_decrease
ldr r2, =0x403f0000
ldr r3, =0x00000000
str r3, [r2, #0xdc]
ldr r2, =0x403e0000
ldr r3, =0x01000020
str r3, [r2, #0x40]
ldr r3, =0x01000000
str r3, [r2, #0x500]
ldr r3, =0x80808080
str r3, [r2, #0x50c]
ldr r3, =0x00140000
str r3, [r2, #0x508]
ldr r3, =0x00000004
str r3, [r2, #0x510]
ldr r3, =0x00000002
str r3, [r2, #0x514]
ldr r3, =0x00000001
str r3, [r2, #0x500]
ldr r3, =0x01000000
wait1:
ldr r4, [r2, #0x500]
and r4, r3
cmp r4, r3
bne wait1
ldr r3, =0x8080801E
str r3, [r2, #0x50c]
ldr r3, =0x00000040
wait2:
ldr r4, [r2, #0x50c]
and r4, r3
cmp r4, r3
bne wait2
ldr r3, =0x00000001
str r3, [r2, #0x30]
ldr r3, =0x11000020
str r3, [r2, #0x40]
ldr r2, =0x403f0000
ldr r3, =0x42000000
str r3, [r2, #0xdc]
.endm
.macro imx7ulp_evk_ddr_setting
imx7ulp_ddr_freq_decrease
/* Enable MMDC PCC clock */
ldr r2, =0x40b30000
ldr r3, =0x40000000
str r3, [r2, #0xac]
/* Configure DDR pad */
ldr r0, =0x40ad0000
ldr r1, =0x00040000
str r1, [r0, #0x128]
ldr r1, =0x0
str r1, [r0, #0xf8]
ldr r1, =0x00000180
str r1, [r0, #0xd8]
ldr r1, =0x00000180
str r1, [r0, #0x108]
ldr r1, =0x00000180
str r1, [r0, #0x104]
ldr r1, =0x00010000
str r1, [r0, #0x124]
ldr r1, =0x0000018C
str r1, [r0, #0x80]
ldr r1, =0x0000018C
str r1, [r0, #0x84]
ldr r1, =0x0000018C
str r1, [r0, #0x88]
ldr r1, =0x0000018C
str r1, [r0, #0x8c]
ldr r1, =0x00010000
str r1, [r0, #0x120]
ldr r1, =0x00000180
str r1, [r0, #0x10c]
ldr r1, =0x00000180
str r1, [r0, #0x110]
ldr r1, =0x00000180
str r1, [r0, #0x114]
ldr r1, =0x00000180
str r1, [r0, #0x118]
ldr r1, =0x00000180
str r1, [r0, #0x90]
ldr r1, =0x00000180
str r1, [r0, #0x94]
ldr r1, =0x00000180
str r1, [r0, #0x98]
ldr r1, =0x00000180
str r1, [r0, #0x9c]
ldr r1, =0x00040000
str r1, [r0, #0xe0]
ldr r1, =0x00040000
str r1, [r0, #0xe4]
ldr r0, =0x40ab0000
ldr r1, =0x00008000
str r1, [r0, #0x1c]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x0D3900A0
str r1, [r0, #0x85c]
ldr r1, =0x00400000
str r1, [r0, #0x890]
ldr r1, =0x40404040
str r1, [r0, #0x848]
ldr r1, =0x40404040
str r1, [r0, #0x850]
ldr r1, =0x33333333
str r1, [r0, #0x81c]
ldr r1, =0x33333333
str r1, [r0, #0x820]
ldr r1, =0x33333333
str r1, [r0, #0x824]
ldr r1, =0x33333333
str r1, [r0, #0x828]
ldr r1, =0xf3333333
str r1, [r0, #0x82c]
ldr r1, =0xf3333333
str r1, [r0, #0x830]
ldr r1, =0xf3333333
str r1, [r0, #0x834]
ldr r1, =0xf3333333
str r1, [r0, #0x838]
ldr r1, =0x24922492
str r1, [r0, #0x8c0]
ldr r1, =0x00000800
str r1, [r0, #0x8b8]
ldr r1, =0x00020052
str r1, [r0, #0x4]
ldr r1, =0x292C42F3
str r1, [r0, #0xc]
ldr r1, =0x00100A22
str r1, [r0, #0x10]
ldr r1, =0x00120556
str r1, [r0, #0x38]
ldr r1, =0x00C700DB
str r1, [r0, #0x14]
ldr r1, =0x00211718
str r1, [r0, #0x18]
ldr r1, =0x0F9F26D2
str r1, [r0, #0x2c]
ldr r1, =0x009F0E10
str r1, [r0, #0x30]
ldr r1, =0x0000003F
str r1, [r0, #0x40]
ldr r1, =0xC3190000
str r1, [r0, #0x0]
ldr r1, =0x00008050
str r1, [r0, #0x1c]
ldr r1, =0x00008058
str r1, [r0, #0x1c]
ldr r1, =0x003F8030
str r1, [r0, #0x1c]
ldr r1, =0x003F8038
str r1, [r0, #0x1c]
ldr r1, =0xFF0A8030
str r1, [r0, #0x1c]
ldr r1, =0xFF0A8038
str r1, [r0, #0x1c]
ldr r1, =0x04028030
str r1, [r0, #0x1c]
ldr r1, =0x04028038
str r1, [r0, #0x1c]
ldr r1, =0x83018030
str r1, [r0, #0x1c]
ldr r1, =0x83018038
str r1, [r0, #0x1c]
ldr r1, =0x01038030
str r1, [r0, #0x1c]
ldr r1, =0x01038038
str r1, [r0, #0x1c]
ldr r1, =0x20000000
str r1, [r0, #0x83c]
ldr r1, =0x00001800
str r1, [r0, #0x20]
ldr r1, =0xA1310000
str r1, [r0, #0x800]
ldr r1, =0x00020052
str r1, [r0, #0x4]
ldr r1, =0x00011006
str r1, [r0, #0x404]
ldr r1, =0x00000000
str r1, [r0, #0x1c]
.endm
.macro imx7ulp_clock_gating
.endm
.macro imx7ulp_qos_setting
.endm
.macro imx7ulp_ddr_setting
imx7ulp_evk_ddr_setting
.endm
/* include the common plugin code here */
#include <asm/arch/mx7ulp_plugin.S>
configs/mx7ulp_evk_defconfig 0 → 100644
+ 17
− 0
View file @ 77fa0457
CONFIG_ARM=y
CONFIG_ARCH_MX7ULP=y
CONFIG_TARGET_MX7ULP_EVK=y
CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_IMX_RGPIO2P=y
CONFIG_DM_I2C=y
CONFIG_SYS_LPI2C_IMX=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7ULP=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
configs/mx7ulp_evk_plugin_defconfig 0 → 100644
+ 18
− 0
View file @ 77fa0457
CONFIG_ARM=y
CONFIG_ARCH_MX7ULP=y
CONFIG_TARGET_MX7ULP_EVK=y
CONFIG_USE_IMXIMG_PLUGIN=y
CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_IMX_RGPIO2P=y
CONFIG_DM_I2C=y
CONFIG_SYS_LPI2C_IMX=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7ULP=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
include/configs/mx7ulp_evk.h 0 → 100644
+ 109
− 0
View file @ 77fa0457
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX7ULP EVK board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX7ULP_EVK_CONFIG_H
#define __MX7ULP_EVK_CONFIG_H
#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
/*Uncomment it to use secure boot*/
/*#define CONFIG_SECURE_BOOT*/
#ifdef CONFIG_SECURE_BOOT
#ifndef CONFIG_CSF_SIZE
#define CONFIG_CSF_SIZE 0x4000
#endif
#endif
#define CONFIG_BOARD_POSTCLK_INIT
#define CONFIG_SYS_BOOTM_LEN 0x1000000
#define SRC_BASE_ADDR CMC1_RBASE
#define IRAM_BASE_ADDR OCRAM_0_BASE
#define IOMUXC_BASE_ADDR IOMUXC1_RBASE
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE SZ_8K
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
/* Using ULP WDOG for reset */
#define WDOG_BASE_ADDR WDG1_RBASE
#define CONFIG_SYS_ARCH_TIMER
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
/*#define CONFIG_REVISION_TAG*/
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
/* UART */
#define LPUART_BASE LPUART4_RBASE
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#undef CONFIG_CMD_IMLS
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CACHELINE_SIZE 64
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 512
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 256
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_CMDLINE_EDITING
#define CONFIG_STACKSIZE SZ_8K
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_TEXT_BASE 0x67800000
#define PHYS_SDRAM 0x60000000
#define PHYS_SDRAM_SIZE SZ_1G
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_CMD_BOOTZ
#define CONFIG_LOADADDR 0x60800000
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_END 0x9E000000
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#ifndef CONFIG_SYS_DCACHE_OFF
#define CONFIG_CMD_CACHE
#endif
#endif /* __CONFIG_H */
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