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Commit 779b5343 authored by Ladislav Michl's avatar Ladislav Michl Committed by Tom Rix
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netstar.h: do not exceed 80 columns


Limit line length to 80 characters mostly by removing obvious and sometimes
misleading comments. Fix indentation, too.

Signed-off-by: default avatarLadislav Michl <ladis@linux-mips.org>
Signed-off-by: default avatarSandeep Paulraj <s-paulraj@ti.com>
parent 3fca2929
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...@@ -27,17 +27,13 @@ ...@@ -27,17 +27,13 @@
#include <configs/omap1510.h> #include <configs/omap1510.h>
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_ARM925T 1 /* This is an arm925t CPU */ #define CONFIG_ARM925T 1 /* This is an arm925t CPU */
#define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP1510 1 /* which is in a 5910 */ #define CONFIG_OMAP1510 1 /* which is in a 5910 */
/* Input clock of PLL */ /* Input clock of PLL */
#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */ #define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz */
#define CONFIG_XTAL_FREQ 12000000 #define CONFIG_XTAL_FREQ 12000000 /* 12MHz */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
...@@ -54,10 +50,10 @@ ...@@ -54,10 +50,10 @@
/* /*
* Physical Memory Map * Physical Memory Map
*/ */
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1 0x10000000
#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ #define PHYS_FLASH_1 0x00000000
#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
...@@ -76,13 +72,13 @@ ...@@ -76,13 +72,13 @@
/* /*
* Size of malloc() pool * Size of malloc() pool
*/ */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128
#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
/* /*
* The stack size is set up in start.S using the settings below * The stack size is set up in start.S using the settings below
*/ */
#define CONFIG_STACKSIZE (1 * 1024 * 1024) /* regular stack */ #define CONFIG_STACKSIZE (1 * 1024 * 1024)
/* /*
* Hardware drivers * Hardware drivers
...@@ -90,8 +86,8 @@ ...@@ -90,8 +86,8 @@
#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */ #define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ)
#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */ #define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE
#define CONFIG_NET_MULTI #define CONFIG_NET_MULTI
#define CONFIG_SMC91111 #define CONFIG_SMC91111
...@@ -128,10 +124,10 @@ ...@@ -128,10 +124,10 @@
/*#define CONFIG_SKIP_LOWLEVEL_INIT */ /*#define CONFIG_SKIP_LOWLEVEL_INIT */
/* /*
* partitions (mtdparts command line support) * Partitions (mtdparts command line support)
*/ */
#define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD #define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=gen_nand.0" #define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=gen_nand.0"
#define MTDPARTS_DEFAULT "mtdparts=" \ #define MTDPARTS_DEFAULT "mtdparts=" \
...@@ -139,7 +135,7 @@ ...@@ -139,7 +135,7 @@
"gen_nand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)" "gen_nand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
/* /*
* Command line configuration. * Command line configuration
*/ */
#define CONFIG_CMD_BDI #define CONFIG_CMD_BDI
#define CONFIG_CMD_BOOTD #define CONFIG_CMD_BOOTD
...@@ -204,12 +200,13 @@ ...@@ -204,12 +200,13 @@
/* /*
* Miscellaneous configurable options * Miscellaneous configurable options
*/ */
#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */ #define CONFIG_SYS_PROMPT "# "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ #define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
...@@ -219,7 +216,7 @@ ...@@ -219,7 +216,7 @@
#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \ #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
(CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE) (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x400000)
/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1. /* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
* This time is further subdivided by a local divisor. * This time is further subdivided by a local divisor.
...@@ -229,8 +226,8 @@ ...@@ -229,8 +226,8 @@
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#define OMAP5910_DPLL_DIV 1 #define OMAP5910_DPLL_DIV 1
#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \ #define OMAP5910_DPLL_MUL \
(1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ) ((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */ #define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
#define OMAP5910_LCD_DIV 2 /* CKL/4 */ #define OMAP5910_LCD_DIV 2 /* CKL/4 */
...@@ -240,7 +237,7 @@ ...@@ -240,7 +237,7 @@
#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */ #define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */ #define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */ #define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b */
#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \ #define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
(OMAP5910_LCD_DIV << 2) | \ (OMAP5910_LCD_DIV << 2) | \
(OMAP5910_ARM_DIV << 4) | \ (OMAP5910_ARM_DIV << 4) | \
......
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