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Commit 75a565f2 authored by Adrian Alonso's avatar Adrian Alonso Committed by Stefano Babic
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arm: imx-common: init: extend init_aips to support imx7


Extend init_aips to support imx7 SoC, use is_soc_type
and is_cpu_type to resolve at run time aips3 settings

Signed-off-by: default avatarAdrian Alonso <aalonso@freescale.com>
parent c5752f73
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...@@ -13,16 +13,11 @@ ...@@ -13,16 +13,11 @@
void init_aips(void) void init_aips(void)
{ {
struct aipstz_regs *aips1, *aips2; struct aipstz_regs *aips1, *aips2, *aips3;
#ifdef CONFIG_MX6SX
struct aipstz_regs *aips3;
#endif
aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR;
aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR;
#ifdef CONFIG_MX6SX
aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR; aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR;
#endif
/* /*
* Set all MPROTx to be non-bufferable, trusted for R/W, * Set all MPROTx to be non-bufferable, trusted for R/W,
...@@ -49,7 +44,8 @@ void init_aips(void) ...@@ -49,7 +44,8 @@ void init_aips(void)
writel(0x00000000, &aips2->opacr3); writel(0x00000000, &aips2->opacr3);
writel(0x00000000, &aips2->opacr4); writel(0x00000000, &aips2->opacr4);
#ifdef CONFIG_MX6SX if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7))
{
/* /*
* Set all MPROTx to be non-bufferable, trusted for R/W, * Set all MPROTx to be non-bufferable, trusted for R/W,
* not forced to user-mode. * not forced to user-mode.
...@@ -67,7 +63,7 @@ void init_aips(void) ...@@ -67,7 +63,7 @@ void init_aips(void)
writel(0x00000000, &aips3->opacr2); writel(0x00000000, &aips3->opacr2);
writel(0x00000000, &aips3->opacr3); writel(0x00000000, &aips3->opacr3);
writel(0x00000000, &aips3->opacr4); writel(0x00000000, &aips3->opacr4);
#endif }
} }
#define SRC_SCR_WARM_RESET_ENABLE 0 #define SRC_SCR_WARM_RESET_ENABLE 0
......
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