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Commit 5804b885 authored by Marek Vasut's avatar Marek Vasut
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usb: mv_udc: Add cacheline length check


Check the length of system cacheline at compile-time and fail
if the system uses too long cachelines.

Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
parent ab65da14
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...@@ -21,6 +21,16 @@ ...@@ -21,6 +21,16 @@
#error This driver only supports one single controller. #error This driver only supports one single controller.
#endif #endif
/*
* Check if the system has too long cachelines. If the cachelines are
* longer then 128b, the driver will not be able flush/invalidate data
* cache over separate QH entries. We use 128b because one QH entry is
* 64b long and there are always two QH list entries for each endpoint.
*/
#if ARCH_DMA_MINALIGN > 128
#error This driver can not work on systems with caches longer than 128b
#endif
#ifndef DEBUG #ifndef DEBUG
#define DBG(x...) do {} while (0) #define DBG(x...) do {} while (0)
#else #else
......
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