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Commit 5102af4d authored by Stefan Roese's avatar Stefan Roese
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sata: sata_mv: Fix misaligned cache warnings


This patch fixes the warnings about misaligned cache on Armada XP:

CACHE: Misaligned operation at range [7facb400, 7facb460]

Signed-off-by: default avatarStefan Roese <sr@denx.de>
parent 059f75d5
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......@@ -572,6 +572,7 @@ static int mv_ata_exec_ata_cmd(int port, struct sata_fis_h2d *cfis,
struct mv_priv *priv = (struct mv_priv *)sata_dev_desc[port].priv;
struct crqb *req;
int slot;
u32 start;
if (len >= 64 * 1024) {
printf("We only support <64K transfers for now\n");
......@@ -628,7 +629,9 @@ static int mv_ata_exec_ata_cmd(int port, struct sata_fis_h2d *cfis,
CRQB_SECTCOUNT_COUNT_EXP_MASK;
/* Flush data */
flush_dcache_range((u32)req, (u32)req + sizeof(*req));
start = (u32)req & ~(ARCH_DMA_MINALIGN - 1);
flush_dcache_range(start,
start + ALIGN(sizeof(*req), ARCH_DMA_MINALIGN));
/* Trigger operation */
slot = get_next_reqip(port);
......@@ -643,8 +646,11 @@ static int mv_ata_exec_ata_cmd(int port, struct sata_fis_h2d *cfis,
process_responses(port);
/* Invalidate data on read */
if (buffer && len)
invalidate_dcache_range((u32)buffer, (u32)buffer + len);
if (buffer && len) {
start = (u32)buffer & ~(ARCH_DMA_MINALIGN - 1);
invalidate_dcache_range(start,
start + ALIGN(len, ARCH_DMA_MINALIGN));
}
return len;
}
......
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