Skip to content
Snippets Groups Projects
Commit 4bc2b575 authored by Troy Kisky's avatar Troy Kisky
Browse files

clock_imx8mm: grab init_uart_clk from mainline

parent de3420aa
No related branches found
No related tags found
No related merge requests found
......@@ -549,6 +549,43 @@ void enable_display_clk(unsigned char enable)
}
}
void init_uart_clk(u32 index)
{
/*
* set uart clock root
* 24M OSC
*/
switch (index) {
case 0:
clock_enable(CCGR_UART1, 0);
clock_set_target_val(UART1_CLK_ROOT, CLK_ROOT_ON |
CLK_ROOT_SOURCE_SEL(0));
clock_enable(CCGR_UART1, 1);
return;
case 1:
clock_enable(CCGR_UART2, 0);
clock_set_target_val(UART2_CLK_ROOT, CLK_ROOT_ON |
CLK_ROOT_SOURCE_SEL(0));
clock_enable(CCGR_UART2, 1);
return;
case 2:
clock_enable(CCGR_UART3, 0);
clock_set_target_val(UART3_CLK_ROOT, CLK_ROOT_ON |
CLK_ROOT_SOURCE_SEL(0));
clock_enable(CCGR_UART3, 1);
return;
case 3:
clock_enable(CCGR_UART4, 0);
clock_set_target_val(UART4_CLK_ROOT, CLK_ROOT_ON |
CLK_ROOT_SOURCE_SEL(0));
clock_enable(CCGR_UART4, 1);
return;
default:
printf("Invalid uart index\n");
return;
}
}
int clock_init(void)
{
uint32_t val_cfg0;
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment